Clock drift in tickless idle mode

cancel
Showing results for 
Search instead for 
Did you mean: 

Clock drift in tickless idle mode

Jump to solution
579 Views
evgenyerlihman
Contributor IV

Hello,

From what i understand, please correct me if i am wrong, the lptmr was added to tickless idle  to minimize time drift during sleep. But from the following comment i can understand the some drift is still possible:

/* Stop the LPTMR and systick momentarily. The time the LPTMR and systick is stopped for
is accounted for as best it can be, but using the tickless mode will
inevitably result in some tiny drift of the time maintained by the
kernel with respect to calendar time. */

I have two questions:

1. What is the drift that i should expect in this case?

2. If i need to use LPTMR for other purposes, and will be using fsl_tickless_systick instead of fsl_tickless_lptmr. What is the drift that i should expect in this case?

Thanks,

Evgeny

1 Solution
185 Views
BlackNight
NXP Employee
NXP Employee

Hi Evgeny,

regardless what timer you are going to use, you will have some drift. The drift is caused by the fact that in tickless idle mode the timer is not continuously running, but the RTOS has to

a) stop the timer

b) update the timer modulo register with the new value

c) restart the timer

This for every tickless timer interrupt. Now how much the drift will be depends on the timer interrupt frequency.

The LPTMR adds some extra drift because the minimal time for the tick is 1 ms. So in the worst case you will be off up to 1ms for every timer tick. In my applications I have a drift in the range of or 10% using LPTMR, and in the range of 2-5% for high frequency SysTick timer.

Note that you can add a compensation with using configSTOPPED_TIMER_COMPENSATION.

More infos: Tickless Low power features in FreeRTOS and Low Power with FreeRTOS: Tickless Idle Mode | MCU on Eclipse 

I hope this helps,

Erich

View solution in original post

1 Reply
186 Views
BlackNight
NXP Employee
NXP Employee

Hi Evgeny,

regardless what timer you are going to use, you will have some drift. The drift is caused by the fact that in tickless idle mode the timer is not continuously running, but the RTOS has to

a) stop the timer

b) update the timer modulo register with the new value

c) restart the timer

This for every tickless timer interrupt. Now how much the drift will be depends on the timer interrupt frequency.

The LPTMR adds some extra drift because the minimal time for the tick is 1 ms. So in the worst case you will be off up to 1ms for every timer tick. In my applications I have a drift in the range of or 10% using LPTMR, and in the range of 2-5% for high frequency SysTick timer.

Note that you can add a compensation with using configSTOPPED_TIMER_COMPENSATION.

More infos: Tickless Low power features in FreeRTOS and Low Power with FreeRTOS: Tickless Idle Mode | MCU on Eclipse 

I hope this helps,

Erich

View solution in original post