BOARD_BootClockRUN for MK22FN128VLH10

[양승도]

I faced a trouble with the configuration of the BOARD_BootClockRUN for MK22FN128VLH10.

I want to configure MCG mode FEE, FLL output 80MHz, Core clock 80MHz, Bus clock 40MHz, Flash clock 20MHz.

IDE: KDS 3.2

SDK: 2.1

MCU: MK22FN128VLH10

How to configure BOARD_BootClockRUN for 80MHz in MK22FN128VLH10?

Best Regards,

Frank Yang

[양승도]

There is no hardware problem for Oscillator (OSC).

This target board is good to operate with KSDK 1.3.

I think your SDK has a problem.

Clock operation is not good with SKD 2.1 in the same hardware condition.

but Clock operation is good with KSDK 1.2, KSDK 1.3 and ProcessorExpert in the same hardware condition.

and this hardware has been used for 1 year and half. and there is no problem yet at the point of clock operation.

[양승도]

Clock is generated but it is not sine wave and wrong operation example code.

It is waveform from EXTAL0 pin.

ther broken chracteristics of the uart interrupt example in SDK 2.1.

Attached is the generated clock configuration tool file:

MK22FN128xxx10_clocks_sources_2017-02-15_00_44

[marek_neuzil]

Hello Frank,

It seems to be an issue of the oscillator circuit design. Please, verify the design according to reference manual of the MK22FN128xxx10 - Oscillator (OSC) chapter and datasheet of the crystal oscillator. You must use the correct crystal oscillator connection and components. You can also find additional details in the Crystal Oscillator Troubleshooting Guide (see http://www.nxp.com/assets/documents/data/en/application-notes/AN3208.pdf).

Best Regards,

Marek Neuzil

[양승도]

I generated the code from Clock Tool in your web site.

Even thought generating the code and X-tal hardware was verified with processorExpert in the past, it didn't work.

Now, it works after marking // some lines: wait and check status as following: I think it is not normal.

status_t CLOCK_SetFeeMode(...)

{

...

/* Wait and check status. */

//while(kMCG_FllSrcExternal != MCG_S_IREFST_VAL)

//{

//}

...

}

Clock Frequency is nothing at probe to x-tal hardware, EXTAL0, XTAL0.

I attached the files which was generated in you web site.

MK22FN128xxx10_clocks_sources_2017-02-13_10_28

MK22FN128xxx10_pins_sources_2017-02-13_03_26

[양승도]

After choosing OSC mode : Using oscillator with external crystal (low power)

[marek_neuzil]

Hello Frank,
I have analyzed you source code and you have selected incorrect configuration of the OSC. When you connect external crystal you must select an external crystal mode and frequency range (and capacity if required). In your application the external reference clock is selected (EXTAL0 pin only is used).

See the following screenshot for details:

 

Note:

SDK 2.0 contains a defect - when FEE mode is selected and OSCERCLK is disabled the initialization code does not finished (a while loop does not finish due to an error). Enable OSCERCLK as a workaround for this issue.

Best Regards,

Marek Neuzil

[xiangjun_rong]

Hi, Frank,

i think you can use the code to set the MCG in FEE mode, but you have to connect the crystal to Extal/Xtal or Extal32/Xtal32 pins and know the clock frequency of crystal, so that you can figure out frdiv, drs parameters.

void BOARD_BootClockRUN(void)
{
    CLOCK_SetSimSafeDivs();

    CLOCK_InitOsc0(&g_defaultClockConfigRun.oscConfig);
    CLOCK_SetXtal0Freq(BOARD_XTAL0_CLK_HZ);

   /* CLOCK_BootToPeeMode(g_defaultClockConfigRun.mcgConfig.oscsel, kMCG_PllClkSelPll0,
                        &g_defaultClockConfigRun.mcgConfig.pll0Config);*/

CLOCK_BootToFeeMode(
    mcg_oscsel_t oscsel, uint8_t frdiv, mcg_dmx32_t dmx32, mcg_drs_t drs, void (*fllStableDelay)(void))

    CLOCK_SetInternalRefClkConfig(g_defaultClockConfigRun.mcgConfig.irclkEnableMode,
                                  g_defaultClockConfigRun.mcgConfig.ircs, g_defaultClockConfigRun.mcgConfig.fcrdiv);

    CLOCK_SetSimConfig(&g_defaultClockConfigRun.simConfig);

    SystemCoreClock = g_defaultClockConfigRun.coreClock;
}

Hope it can help you

BR

xiangjun Rong