verify ADC conversion rate with oscilloscope

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verify ADC conversion rate with oscilloscope

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verify ADC conversion rate with oscilloscope

This hint will demonstrate how to verify ADC conversion rate (with oscilloscope) during testing phase.

 

Refer to the phenomenon descripted in"Figure 1. Voltage drops at ADC input during sampling process" of AN4373.

Voltage drops at ADC input during sampling process.png

If too large values is selected for the external RC components, serious voltage disturbances (voltage drops/peaks) at the ADC input (see Figure 1) can be observed. The disturbance at the ADC input in this case results from the basic principle of operation of the sample and hold (S/H) circuit inherent in a SAR ADC. Although we should avoid this happening, but it can be used to measure the ADC conversion rate with oscilloscope during testing phase.

 

According to the 'Table 30. 16-bit ADC operating conditions' of K64P144M120SF5, we can know that the max ADC conversion rate is 818.330 ksps.

16-bit ADC operating conditions.png

Here I create an example by using KDS3.2 with Processor Expert(See the attach file). After select same configuration according to that table, I got almost the same ADC conversion rate.

ADC conversion rate 12bit 18mHz FRDM-K64F 818kHz.png

The conversion time meet equation given in Reference Manual too.

Conversion time equation 12bit.png

Now let's measure the ADC conversion rate on FRDM-K64F board with oscilloscope. After connected an external 1.5KΩ resistance, the value of external RC components is big enough to be observed.

external RC components FRDM-K64F.png

FRDM-K64F connection.jpg

Below is the waveform observed with oscilloscope, the frequency between voltage drops at ADC input during sampling is about 818 ksps. This test result is consistent with the theoretical calculated value.

ADC conversion rate 12bit 18MHz FRDM-K64F 818kHz oscilloscope.bmp

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‎10-12-2017 06:04 PM
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