the cortex_m4 technical reference manual say that:from 0x00000000 to 0x20000000 is code map,from 0x20000000 to
0x40000000 is sram,
but the k64 technical reference manual say that:the sram map is from 0x1fff0000
why the inital address of sram is in the code map of cortex_m4?
Yes, Kinetis K series devices split SRAM to two block and two address range. Please refer to 126.96.36.199 SRAM accesses in 64 reference manual. From figure 3-26, you can see that two memory block has their own access port. Thus, CPU core and other masters can access them simultaneously. This structure can speed up its work.
BTW, it is not recommended to mix use these two block. Please refer to FreeRTOS Heap with Segmented Kinetis K SRAM | MCU on Eclipse