Also, make sure that NO_PLL_INIT is defined. If it is, make sure that the following section in sysinit.c looks like this:
#if defined(NO_PLL_INIT)
mcg_clk_hz = 21000000;
SIM_SOPT2 &= ~SIM_SOPT2_PLLFLLSEL_MASK; // clear PLLFLLSEL to select the FLL for this clock source
uart0_clk_khz = (mcg_clk_hz / 1000); // the uart0 clock frequency will equal the FLL frequency
In addition, make sure that UART0 is being re-initialized to the correct baud rate (115200). The UART0 register settings in the UART0_Init function should look like so:
UART0_BDH = 0x00;
UART0_BDL = 0x1A;
UART0_C4 = 0x06;
UART0_C1 = 0x00;
UART0_C3 = 0x00;
UART0_MA1 = 0x00;
UART0_MA1 = 0x00;
UART0_S1 |= 0x1F;
UART0_S2 |= 0xC0;
For future reference, the UART baud rate is defined as such:
/*
* baud rate = CLK / [(OSR + 1) x BR]
* Where CLK is the bus clock speed in hz,
* OSR is over sampling ratio (UARTx_C4 bits 0-4),
* and BR is baud rate modulo divisor (UARTx_BDL bits 0-7).
*/
Further explanation can be found in Chapter 39 of the KL25 Reference Manual.
http://cache.freescale.com/files/32bit/doc/ref_manual/KL25P80M48SF0RM.pdf?fpsp=1&WT_TYPE=Reference%2...