kl25z vlpr_lls_adc project failed to toggle LED?

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kl25z vlpr_lls_adc project failed to toggle LED?

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kai_liu
Senior Contributor I

I tried to run the demo code from FSL (D:\Freescale\Kinetis L Sample Code\kl25_sc_rev5\klxx-sc-baremetal\build\iar\vlpr_lls_adc). The RGB LED should be toggled based upon counter of LPTMR timebase.

However LED array doesn't change at all. The hardware is all right, since the FRDM_KL25ZDemo works fine. The only differences between these demo applications is : vlpr_lls_adc uses GPIO to toggle LED, while FRDM_KL25ZDemo uses TPM to drive RGB LEDs.

Does anyone knows why?

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chris_brown
NXP Employee
NXP Employee

Hi Kai Liu,

It looks like the data direction registers for each LED are not being configured correctly.  Instead of waiting on an update, try modifying the SW_LED_Init function such that after each LED enable, the data direction port is configured for the corresponding LED.  So the code should look like this:

LED0_EN;

LED0_DIR;

LED1_EN;

LED1_DIR

LED2_EN;

LED2_DIR;

LED3_EN;

LED3_DIR;

We will make sure to change this in our next sample code update. 

Thanks,

Chris

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chris_brown
NXP Employee
NXP Employee

Hi Kai Liu,

It looks like the data direction registers for each LED are not being configured correctly.  Instead of waiting on an update, try modifying the SW_LED_Init function such that after each LED enable, the data direction port is configured for the corresponding LED.  So the code should look like this:

LED0_EN;

LED0_DIR;

LED1_EN;

LED1_DIR

LED2_EN;

LED2_DIR;

LED3_EN;

LED3_DIR;

We will make sure to change this in our next sample code update. 

Thanks,

Chris

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kai_liu
Senior Contributor I

Thanks,  Chris,

It solves my issue. I found the macro definitions in freedom.h

  #define LED0_DIR (GPIOB_PDDR |= (1<<18))

  #define LED1_DIR (GPIOB_PDDR |= (1<<19))

  #define LED2_DIR (GPIOD_PDDR |= (1<<1))

  #define LED3_DIR

In SW_LED_Init()

   LED0_EN; // (PORTA_PCR16 = PORT_PCR_MUX(1))

   GPIOA_PDDR |= (1<<16);

   LED1_EN; // (PORTA_PCR17 = PORT_PCR_MUX(1))

   GPIOA_PDDR |= (1<<17);

   LED2_EN; // (PORTB_PCR8 = PORT_PCR_MUX(1))

   GPIOB_PDDR |= (1<<8);

   LED3_EN; // (PORTA_PCR5 = PORT_PCR_MUX(1))

   GPIOA_PDDR |= (1<<5);

The LED0/1/2/3 were setup as PTA16/PTA17/PTB8/PTA5. I guess it is a issue due to wrong GPIO layout due to clone source from other projects.

Yours sincerely

Allan K Liu

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