k60 clock hanging

[arunkumar1989]

Hello everyone,

Currently I am using K60FN1M0VLQ15 core,but it seems to be hanging at this region

[code]

while((MCG_S & MCG_S_OSCINIT0_MASK) == 0x00U) { /* Check that the oscillator is running */

  }

[/code]

Searching around i found this fix where we have to change the RANGE to 0x01.But doing that also did not solve the issue.

[code]

/* MCG_C10: LOCRE2=0,??=0,RANGE1=2,HGO1=0,EREFS1=0,??=0,??=0 */

  MCG_C10 = MCG_C10_RANGE1(0x02);

  /* MCG_C2: LOCRE0=0,??=0,RANGE0=2,HGO0=0,EREFS0=1,LP=0,IRCS=0 */

  MCG_C2 = (MCG_C2_RANGE0(0x02) | MCG_C2_EREFS0_MASK);

[/code]

Is there any PLL clock settings i am missing or is there a fix around this?

MGC mode is set to PEE and my desired MGC output is 150 MHz

Thanks in advance

Arun

[Hui_Ma]

Hi Arun,

It need to enable OSC1 by configuring it in the MCG_C10 register – set up the parameters just like OSC0. Then you have to enable it by setting the ERCLKEN bit in the OSC1_CR register. Once you have the OSC1 enabled, you can then select it as the reference for PLL0 or PLL1. It is tricky if you want to use OSC1 as the reference for the PLL that is providing the system clock in PEE mode. You must first transition from FEI to FBE to PBE before switching from PBE to PEE. You can only be in FBE

mode (and PBE) using either OSC0 or the RTC clock as the external clock source. You cannot be in there clock modes with OSC1.

Attached code is MCG works in PEE mode (MCG clock output from PLL0, the PLL0 refer clock is OSC1).

Wish it helps.
best regards
Ma Hui

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