Hi Xiangjun
I am using MQX APIs to enter VLPR mode by similar code for single stepping on begin of my task:
/* test code */
{
int a = 0;
while (1) {
if ( a == 100 ) {
break;
}
}
}
enter_VLPR();
{
int a = 0;
while (1) {
if ( a == 100 ) {
break;
}
}
}
exit_VLPR();
...
void enter_VLPR(void)
{
/* Changing frequency to 2 MHz */
if (CM_ERR_OK != _lpm_set_clock_configuration(BSP_CLOCK_CONFIGURATION_2MHZ))
{
//printf("Cannot change clock configuration");
//_task_block();
}
if ( _lpm_set_operation_mode (LPM_OPERATION_MODE_WAIT) == 0 ) {
/* OK */
} else {
/* NOK */
}
}
void exit_VLPR(void)
{
/* Return to RUN mode */
if( _lpm_set_operation_mode (LPM_OPERATION_MODE_RUN) == 0 ) {
/* OK */
} else {
/* NOK */
}
/* Return default clock configuration */
if (CM_ERR_OK != _lpm_set_clock_configuration(BSP_CLOCK_CONFIGURATION_DEFAULT))
{
//printf("Cannot change clock configuration");
//_task_block();
}
}
exit_VLPR() exits VLPR mode by the code you tested. Can you please again to test it after putting your board in VLPR mode? and confirm the XTAL0 is back to 3v or clocking after resuming (FBE)? Our custom board clock circuit doesn't follow the TWR reference design. I tried with and without 10p capacitors but got same result. I only see voltage change on XTAL0, no clock comes back.
Some updates here which may be useful to you. I just tested the original MQX4.1 low power demo code on my board and got same results: it stuck at MCG_C1=0x98. Likely our clock circuit might have problem, can you please review the design shown above? We are using MK20DX128VFM5 while TWR board uses K20DX128VLH5.
thanks and regards
Hui
Hi, Hui,
Regarding the the setting of the MCG_C2, which you set as MCG_C2 = (uint8_t)0x25U in FBE, I think the disputable bit is the HGO bit, which is defined as the following:
HGO High Gain Oscillator Select:
Controls the crystal oscillator mode of operation. See the Oscillator (OSC) chapter for more details.
0 Configure crystal oscillator for low-power operation.
1 Configure crystal oscillator for high-gain operation.
But I do not have detailed description about the circuit and function except for the User manual of K20. I copy it here:
26.8.2.3 High-Frequency, High-Gain Mode
In high-frequency, high-gain mode, the oscillator uses a simple inverter-style amplifier.
The gain is set to achieve rail-to-rail oscillation amplitudes. This mode provides low pass
frequency filtering as well as hysteresis for voltage filtering and converts the output to
logic levels. In this mode, the internal capacitors could be used.
26.8.2.4 High-Frequency, Low-Power Mode
In high-frequency, low-power mode, the oscillator uses a gain control loop to minimize
power consumption. As the oscillation amplitude increases, the amplifier current is
reduced. This continues until a desired amplitude is achieved at steady-state. In this
mode, the internal capacitors could be used, the internal feedback resistor is connected,
and no external resistor should be used.
The oscillator input buffer in this mode is differential. It provides low pass frequency
filtering as well as hysteresis for voltage filtering and converts the output to logic levels.
I checked the clock part of DSC, it has the diagram:
But the DSC do not give detailed explanation either for the theory of :"low power Oscillator" and "High gain Oscillator".
If someone has knowledge about the topic, welcome share knowledge and inf on the open community platform.
BR
Xiangjun Rong
