I have adapted code for the K40 tower running in PEE mode at 96MHz. (from an external 8Mhz xtal) this is confirmed by register settings checked in debug and a correct baud rate on serial port. The freq of MCGOUT = system clock = 96Mhz. I measure 48Mhz on a scope at the trace output.
Does the trace output do an (undocumented ?) divide by 2?
Thanks!
Hi, a late reply but in this thread it is concluded that trace clock is half the core clock:
https://community.freescale.com/thread/89398
Dear stav,
I came to the same conclusion. I couldn't find any reference in the Kinetis documentation however some ARM documentation mentions a half-rate clock (option) for the traceclk. The option is chosen by the implementor (Freescale). I believe this is the case for the Kinetis devices.
bye