void SPI_InitMater( void )
{
// enable clock gate for spi module
SIM_SCGC4 |= SIM_SCGC4_SPI0_MASK;
// enable PORT
SIM_SCGC5 |= SIM_SCGC5_PORTA_MASK|SIM_SCGC5_PORTB_MASK;
// disable SPI
SPI0_C1 &= ~SPI_C1_SPE_MASK;
// configure I/O to SPI function
/*
PORTA_PCR5 &= ~PORT_PCR_MUX_MASK;
PORTA_PCR5 |= PORT_PCR_MUX(3)|PORT_PCR_DSE_MASK; //Use PTA5 as SPI0_SS_b
*/
PORTA_PCR6 &= ~PORT_PCR_MUX_MASK;
PORTA_PCR6 |= PORT_PCR_MUX(3)|PORT_PCR_DSE_MASK; //Use PTA6 as SPI0_MISO
PORTA_PCR7 &= ~PORT_PCR_MUX_MASK;
PORTA_PCR7 |= PORT_PCR_MUX(3)|PORT_PCR_DSE_MASK; //Use PTA7 as SPI0_MOSI
PORTB_PCR0 &= ~PORT_PCR_MUX_MASK;
PORTB_PCR0 = PORT_PCR_MUX(3)|PORT_PCR_DSE_MASK; //Use PTB0 as SPI0_SCK
SPI0_C1 |= SPI_C1_MSTR_MASK;
//SPI0_BR = 0x02;
//SPI0_BR = (SPI_BR_SPPR(0x06) | SPI_BR_SPR(0x00));//速率1.713MHz
//SPI0_BR = (SPI_BR_SPPR(0x02) | SPI_BR_SPR(0x02));
SPI0_BR = (SPI_BR_SPPR(0x02) | SPI_BR_SPR(0x03));//436.907KHz
SPI0_C1 |= SPI_C1_SSOE_MASK;
SPI0_C2 |= SPI_C2_MODFEN_MASK;
SPI0_C2 |= SPI_C2_SPC0_MASK;
SPI0_C2 &= ~SPI_C2_SPC0_MASK;
SPI0_C1 |= SPI_C1_CPHA_MASK;
SPI0_C1 &= (~SPI_C1_CPHA_MASK);
SPI0_C1 |= SPI_C1_CPOL_MASK;
SPI0_C1 &= (~SPI_C1_CPOL_MASK);
SPI0_C1 |= SPI_C1_LSBFE_MASK;
SPI0_C1 &= (~SPI_C1_LSBFE_MASK);
SPI0_C1 |= SPI_C1_SPE_MASK;
}
用的例程中的配置,slave的极性和相位都是0