Mark, Jorge,
Thank you for the responses. As for WDOG in debug, I am setting the DBG bit within the WDOG_CS1 register. My understanding is that this will enable the WDOG during debug.
The UPDATE bit
is set during the __init_hardware routine:
void __init_hardware()
{
SCB_VTOR = (uint32_t)__vector_table; /* Set the interrupt vector table position */
/* Disable the Watchdog because it may reset the core before entering main(). */
WDOG_TOVAL = 0xE803; // setting timeout value
WDOG_CS2 = WDOG_CS2_CLK_MASK; // setting 1-kHz clock source
WDOG_CS1 = 0x23; // Watchdog disabled,
// Watchdog interrupts are disabled. Watchdog resets are not delayed,
// Updates allowed. Software can modify the watchdog configuration registers within 128 bus clocks after performing the unlock write sequence,
// Watchdog test mode disabled,
// Watchdog disabled in chip debug mode,
// Watchdog enabled in chip wait mode,
// Watchdog enabled in chip stop mode.
}
Once this routine is complete the TOVAL (BIG Endianess) is set @ 1000 for a 1 second (Supposedly, The value of CLKS is 0x03 (WDOG_CS2_CLK_MASK = 0x3u) so it is clocked by external NOT the 1 kHz internal LPOSC as described in comments by FS). WDOG_CS2 - 0x03 setting the CLK source to the External Clock Source
WDOG_CS1 disables the WDOG, Allows updates at a future time, Enables WDOG in chip wait mode, and Enables WDOG in chip stop mode
please correct me if I am wrong at this point. Mark, I am assuming that the ALLOWUPDATE bit that is referenced in your post above is equivalent to the UPDATE bit I am using.
So, things are initialized and my main is entered. The first thing I do is setup the ICS to run at roughly 16 MHz. I verified this with an oscilloscope while the CLKOE bit was set, placing BUS Clock on PTH2. Once the clock is setup, I "wiggle" pin PTC1 for 10 mS (roughly) which is connected to an LED on the TRK-KEA64 dev board I am working with. I am also triggering off this line with my scope. This give me an indicator that the IC is starting up. I now enter my WDOGInit() routine:
| /********************************************************************* |
*void WDOGInit(void)
**********************************************************************
*
| * Return: | NONE |
*
* Parameters: NONE
*
* Notes:
*
*********************************************************************/
void WDOGInit(void) {
| /*Disable the interrupts*/ | |||
| asm("CPSID i"); | |||
| /*Unlock the WDOG to reconfigure it*/ | |||
| WDOG_CNT = 0x20C5; | /*First Unlock Word*/ | ||
| WDOG_CNT = 0x28D9; | /*Second Unlock Word*/ | ||
| /*Set the timeout value to 100 mS*/ | |||
| WDOG_TOVAL = 0x6400; | |||
| /*Set the clock to the 1KHz LPOCLK*/ | |||
| WDOG_CS2 = 0x01; |
| #ifdef WDOG_Debug | |
| /*Enable the Dog*/ | |
| WDOG_CS1 = 0x84; |
#else
| /*Enable the Dog*/ | |
| WDOG_CS1 = 0x80; |
#endif
| /*Enable the interrupts*/ | |
| asm("CPSIE i"); |
} /* end void WDOGInit(void) */
/**********************************************************************/
/**********************************************************************/
Once I exit the WDOGInit routine I have another GPIO PTC2, also connected to an LED on the dev board, that I set to indicate successful return. I then enter an infinite while loop that periodically toggles yet another GPIO PTC0, again, also tied to an LED. I DO NOT service the WDOG during this loop, so the expected result is a system reset every 100 mS or so.
| WDOGInit(); |
| PSORC2 = 0x01; |
| /****************************************************************/ | |
| /****************************************************************/ |
| PDDRC0 = (unsigned char)Output; | |
| tmpCounter = 0x0000; |
| while(1) { | ||
| /* /*Disable the interrupts*/ | /**/ | |
| /* asm("CPSID i"); | */ | |
| /* | */ | |
| /* WDOG_CNT = 0x02A6; | */ | |
| /* WDOG_CNT = 0x80B4; | */ | |
| /* | */ | |
| /* /*Enable the interrupts*/ | /**/ | |
| /* asm("CPSIE i"); | */ | |
| if(++tmpCounter >= 0x0001FFFF) { | ||
| PTORC0 = 1; | ||
| tmpCounter = 0x0000; | ||
| }else { | ||
| } | ||
| } /* end while(1) */ |
| return(0); |
*****PLEASE NOTE THE WDOG SERVICE IS COMMENTED OUT*****
I launch CodeWarrior, and import my elf file that is generated. I set a break point within my WDOGInit routine where I turn off the interrupts. And I run.
The WDOG registers are set as expected CS1 = 0x23, CS2 = 0x03, TOVAL = 0x03e8.
I try stepping into the next instruction but using the debugger I get a reset, so I place a breakpoint at the spot I re-enable the interrupts and allow the code to run.
Again the registers are setup as expected. CSS1 = 0x84 (WDOG enabled, and WDOG enabled during debug), CS2 has the CLK set to the 1KHz LPOSC, TOVAL is set at 100 for a reset @ 100 mS. I then allow the code to run, It then enteres the infinite loop and begins to toggle the LED connected to PTC0 and never show any sign of resetting, ("Wiggle" LED Signals).
I also tried using the OPEN SDA connection to upload just my hex file (allowing the code to NOT run in debug mode I am assuming), and the result is the same as far as what I see on the scope and with the led's.
So, here is my question, what am I doing wrong? Thank you for the previous replies but everything that you sent me is exactly what I was doing. I thought that could be seen in the elf file. As far as the differences yes I tried mirroring the unlock values because the Endianess is BIG Endianess for the CNT Register. WDOG_CNTH is at a lower memory address than WDOG_CNTL. Writing BIG Endianess style was causing a WDOG reset as soon as I tried to write the first unlock sequence. Go figure that some registers that are BIG Endianess in memory are written to in Little Endianess fashion (WDOG_CNT) while others are written in BIG Endianess fashion (WDOG_TOVAL) really sucks as a developer, cause it is usually left as an exercise to the developer to figure out WHICH ONES. So anyway any help that you could provide will be GREATLY APPRECIATED.
As a side, I was noticing in the debugger that the value of CNT was not increasing. It appears to be 0x0000 all the time. I checked and cannot find any gate control for the LPO within the SIM_SCGC register, so I am assuming that the 1KHz LPO is "always on".
Hi
If you are 're-configuring' the watchdog it is only possible when the ALLOWUPDATE was initially set in WDOG_STCTRLH.
Regards
Mark
