Hi John
If the parts doesn't have Ethernet the TCP/IP stack (and USB etc.) are automatically removed so there is no effort required on main configurations.
The cost of an OS with drivers for both UARTs, watchdog task and non-blocking operation on top of the BLDC project is +4.2k
- a second application interface with "Hello, World" type output on UART0 and minimal user interface is +4.5k (i.e. +4.2 + 0.3k)
- with DMA operartion on both UARTs it is +5.0k (i.e. 4.5k + 0.5k)
- with dymanic low power support it is +5.5k (i.e. 5k + 0.5k)
- etc. depending on which features are of use in the project and enabled
{These sizes are with interupt vectors located in SRAM, which is a bit faster than the original Flash location. By putting then back to Flash a further size reduction of up to about 1k can be achieved}
However, since the OS includes various functions (software timers, queue systems etc.) that can be used by the application (rather than having to add them when needed to achieve the project's behavioral requirements) the difference reduces as the application grows (because the functions would need to be developed and added - taking up this space - anyway).
See also : https://community.freescale.com/message/485881#485881
which shows that the OS includes everything you need for using formatted output and in case this is done by using libraries instead the code size will tend to explode to a multiple of the OS size anyway (and still leave various things unsolved).
However code size is not necessarily the main argument since the OS generally makes development easier and more reliable. It also allows the project to be simulated (in VisualStudio - free Express Edition is adequte), which can greatly accelerate much development work.
In case you need something like a parameter system or external SPI Flash storage capabilities it can be added by enabling a single project define and it is there. If you later move up to a Kinetis part with USB it will still be compatible (assuming peripherals available) but you could add USB operation with a single define change. This is valid right up to processors with Ethernet where the TCP/IP stack could be enabled without changing any of the original application code.
So at the end of the day it is more a question of whether 4.2k is more expensive than ability to significantly reduce project time scales and obtain easy to maintain code for future advancements.
As reference I have attached a build with just a "Hello, world" and echo on the application/debug UART (UART 0) to show the + 4.5k case; The BLDC part is all there with FreeMaster on UART1.
Further noteworthy advantages of the framework is that if there is USB available FreeMaster can operate over it, which is presently not possible with the standard FreeMaster project code (this in parallel with other USB-CDC interfaces and/or MSD, HID etc. as composite device). Not an issue for this chip (without USB) but worth noting generally. Although not in this binary the uTasker FreeMaster implementation allows optionally reading and writing from/to Flash (both internal and SPI based types)
Regards
Mark
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