Using KE02 ADC in FIFO mode with ASCANE

[wre]

Hi.  I'm trying to use the ADC FIFO mode to convert four channels (SC4_AFDEP set to 3) using a software trigger.  At present it seems that I need to load each of the four channels in sequence into SC1_ADCH and when the FIFO is filled a conversion will start.  Can SC4_ASCANE be used in this case or does that set up a scan of only a single channel?

In other words, is there a way to set up the four desired channels in the FIFO and then, with SC4_ASCANE set, trigger another conversion set just by writing once to SC1_ADCH?  Or are multiple channels and ASCANE mutually exclusive operations?

Thanks!

[xiangjun_rong]

Hi, Bill,

I think the ADC can sample different channels in the FIFO mode. If you clear the ASCANE bit in ADC_SC4 register, and write the AFDEP with a non-zero value, then write the ADC_SC1 register with different channels multiple times to fill the FIFO, after the FIFO has been filled, the ADC will convert automatically if you use software triggering mode. after all the channels has been sampled, the COCO in SC1 will be set, you can poll the COCO bit in SC1 register, once it is set, read the ADC_R register multiple times to get sample.

This is the code I run in KE02, I can read different channels:

BR

Xiangjun Rong

#include "SKEAZN642.h"

static int i = 0;

#define CH22 22   //temperature sensor

#define CH23  23   //bandgap voltage

#define CH29  29

void ADCInit(void);

void startConversion(void);

uint16_t sample[8];

int main(void)

{

    /* Write your code here */

    ADCInit();

    /* This for loop should be replaced. By default this loop allows a single stepping. */

    for (;;) {

        i++;

        startConversion();

    }

    /* Never leave main */

    return 0;

}

void ADCInit(void)

{

    //set the ADC in   FIFO mode

    //enable ADC clock

    SIM_SCGC|=0x20000000;

    ADC_SC3|=ADC_SC3_ADIV(3)|ADC_SC3_MODE(2)| ADC_SC3_ADICLK(1)|ADC_SC3_ADLSMP_MASK;

    ADC_SC4|=ADC_SC4_AFDEP(2);

    //fill the channel

#if 0

    ADC_SC1=ADC_SC1_AIEN_MASK|ADC_SC1_ADCH(CH0);

    ADC_SC1=ADC_SC1_AIEN_MASK|ADC_SC1_ADCH(CH1);

    ADC_SC1=ADC_SC1_AIEN_MASK|ADC_SC1_ADCH(CH2);

    ADC_SC1=ADC_SC1_ADCH(CH0);

    ADC_SC1=ADC_SC1_ADCH(CH1);

    ADC_SC1=ADC_SC1_ADCH(CH2);

#endif

}

void startConversion(void)

{

    ADC_SC1=ADC_SC1_ADCH(CH22);

    ADC_SC1=ADC_SC1_ADCH(CH23);

    ADC_SC1=ADC_SC1_ADCH(CH29);

    //checking the state

    while(!(ADC_SC1&ADC_SC1_COCO_MASK)) {}

    {

        sample[0]=ADC_R;

        sample[1]=ADC_R;

        sample[2]=ADC_R;

    }

    __asm("nop");

}

////////////////////////////////////////////////////////////////////////////////

// EOF

[wre]

Thanks for the reply.  That is basically what I am doing.

Bill

[mjbcswitzerland · Accepted solution]

Bill

SC4_ASCANE means that the channel in the first FIFO buffer is used for all conversions (i.e. a single channel). This means that only one channel needs to be written to start multiple conversions to fill up the FIFO depth that you have specified.

Without SC4_ASCANE enabled you can specify multiple channels by writing them fast/sequentially to the FIFO. The results of the conversions (from different channels if they are really different) are collected in the FIFO so that you can read them sequentially.

Therefore, as you probably already expect, setting the SC4_ASCANE automatically fixes the single channel that will be read multiple times to fill the FIFO depth and excludes multiple, different channels in the sequence.

Regards

Mark

[wre]

Thanks Mark.  I had hoped that I could set up the FIFO with different channels once and then simply trigger the same set of channels with a single write.  However, writing the sequence of channels each time is not cumbersome.

Bill