USBDCD module signals

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USBDCD module signals

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ERussell
Contributor IV

I would like to clarify the signals for the USBDCD module. I'll be using USB0 for normal FS communication. If I want to add the device charger detection module would I connect the VBUS signal (from the USB connector) to pin USB1_VBUS on the K65 processor for either USB0 or USB1? If I need to allow for the processor to be in a low power mode it sounds like I would need a separate interrupt with low power wakeup capability to power up the USB module? If so I believe I can use a status output from the charger chip to generate an interrupt with the correct voltage.

Thanks,

Elizabeth

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Hui_Ma
NXP TechSupport
NXP TechSupport

Hi,

Customer can connect VBUS signal to either USB module (USB0 or USB1).

The USB FS module wakeup from a a low power mode (except in LLS/VLLS mode where USB is not powered) occurs through an asynchronous interrupt triggered by activity on the USB bus. Setting the USBTRC0[USBRESMEN] bit enables this function. It needs a separate interrupt to wakeup USB FS module from low power mode.

The USB HS module is different.

In Stop/VLPS, the USB controller can generate an interrupt on VBUS detection or on Resume/Wakeup signaling on the USB1_DP and USB1_DM pins.

It needs a separate interrupt to wakeup USB HS module from low power mode.

In LLS/VLLS, the USB1_VBUS, USB1_DP and USB1_DM are input pins to the LLWU and a transition on those pins can generate a wakeup provided the USB is powered. In VLLS0 and VLLS1, a wakeup is only generated if the USB PHY was powered on entry into the low power mode. It does not need a separate wake up signal, which could be the same signal through LLWU module to wake up.

There doesn't need a 5V tolerance GPIO pin, customer can use a normal I/O to wake up the core from low power mode.

With it helps.


Have a great day,
Ma Hui

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Hui_Ma
NXP TechSupport
NXP TechSupport

Hi,

Customer can connect VBUS signal to either USB module (USB0 or USB1).

The USB FS module wakeup from a a low power mode (except in LLS/VLLS mode where USB is not powered) occurs through an asynchronous interrupt triggered by activity on the USB bus. Setting the USBTRC0[USBRESMEN] bit enables this function. It needs a separate interrupt to wakeup USB FS module from low power mode.

The USB HS module is different.

In Stop/VLPS, the USB controller can generate an interrupt on VBUS detection or on Resume/Wakeup signaling on the USB1_DP and USB1_DM pins.

It needs a separate interrupt to wakeup USB HS module from low power mode.

In LLS/VLLS, the USB1_VBUS, USB1_DP and USB1_DM are input pins to the LLWU and a transition on those pins can generate a wakeup provided the USB is powered. In VLLS0 and VLLS1, a wakeup is only generated if the USB PHY was powered on entry into the low power mode. It does not need a separate wake up signal, which could be the same signal through LLWU module to wake up.

There doesn't need a 5V tolerance GPIO pin, customer can use a normal I/O to wake up the core from low power mode.

With it helps.


Have a great day,
Ma Hui

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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