USB max Isochronous packet size.

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USB max Isochronous packet size.

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pedroerencia
Contributor II

Hello,

we are trying to setup an MK50X256CLL100 to do Isochronous transfer with packet size of 1023. We have modified the audio example on the USB stack and, basically, changed the packet size in the descriptor from 64 to 1023. That did not work :smileyhappy:. After some tests, we discovered that up to 479 packet size the transmissions were done correctly. After that (480), even though the descriptor appears correct when doing an lsusb, the USB stack seems to not reach the callback when an URB is sent (and usbmon says it has been sent).

So, is there any limitation on Isochronous Endpoints ? Why thismysterious number (480) ? Are we forgetting to do something more on the descriptor configuration ?

Thanks :smileyhappy:

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mjbcswitzerland
Specialist V

Pedro

I don't use the Freescale USB stack so don't know full details about it but if I search through the code I find these:

__declspec (usb_bdt) static uint_8 g_Mem[BYTES_1024];

static void USB_Bus_Reset_Handler (void)

{

...

/* Clear Memory for BDT and buffer Data */
Clear_Mem((uint_8_ptr)g_bdtmap,(uint_32) BYTES_1024, (uint_8)0);

    /* Initialize BDT buffer address */

    g_bdt_address = ((uint_32)g_bdtmap + BYTES_512);

...

}

It looks as though there is 1k of memory assigned for buffer descriptor use (usually ther are two buffer descriptors operating in ping-pong mode) and so that would give 512 bytes to each. Possibly there is some overhead which explains why you have a 480 byte limit but it seems likely that the buffer descriptor memory needs to be increased to be able to work with larger endpoint sizes.

Regards

Mark

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mjbcswitzerland
Specialist V

Hi

Increasing the endpoint's FIFO depth informs the USB host that larger sizes are possible but have you checked that the buffer descriptors are also corresponding large (in RAM) so that this will work?

Regards

Mark

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pedroerencia
Contributor II

Hi Mark, thanks for your reply.

How could we check that ? Are you referring to the Byte Count in the Buffer Descriptor ? If that was 1023, can we be sure that there's actually enough SRAM, I mean, does the USB Stack ensure that ?

Thanks :smileyhappy:

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120 Views
mjbcswitzerland
Specialist V

Pedro

I don't use the Freescale USB stack so don't know full details about it but if I search through the code I find these:

__declspec (usb_bdt) static uint_8 g_Mem[BYTES_1024];

static void USB_Bus_Reset_Handler (void)

{

...

/* Clear Memory for BDT and buffer Data */
Clear_Mem((uint_8_ptr)g_bdtmap,(uint_32) BYTES_1024, (uint_8)0);

    /* Initialize BDT buffer address */

    g_bdt_address = ((uint_32)g_bdtmap + BYTES_512);

...

}

It looks as though there is 1k of memory assigned for buffer descriptor use (usually ther are two buffer descriptors operating in ping-pong mode) and so that would give 512 bytes to each. Possibly there is some overhead which explains why you have a 480 byte limit but it seems likely that the buffer descriptor memory needs to be increased to be able to work with larger endpoint sizes.

Regards

Mark

View solution in original post

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119 Views
pedroerencia
Contributor II

Great!

Thanks Mark, that was exactly what we were looking for :smileyhappy:

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