USB CDC VCOM code problem

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USB CDC VCOM code problem

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raduansarif
Contributor I

Hello, from this example frdmkl27z_dev_cdc_vcom_bm, after stepping over the code. I have some problems running the code

raduansarif_0-1648034387490.jpeg

((uint8_t *)FSL_FEATURE_USB_KHCI_USB_RAM_BASE_ADDRESS)[i] = 0x00U;
in this part is going hardfault file code is not working. 

Here they talk about USB RAM/buffer, but we are not using extra RAM/buffer for the USB.

How do I need to change this part?

I am using MKL 27Z128LH4 MCU custom board, following SDK 

raduansarif_1-1648034606649.jpeg

My professor said maybe I am using the wrong SDK or wrong board example, but the same SDK I2C is working on my board.

Please do my SDK and USB example is accurate for the MKL27Z128LH4 board.

 

I will be thankful to everyone to help me as this is part of my master's thesis.

Thank you, everyone.

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2 Replies

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bobpaddock
Senior Contributor III

The KL27 does not have dedicated USB RAM.

The Buffer Description Table (BDT) needs assigned to local RAM, as shown below.

Sorry, I can't help with IDE stuff, as I don't use it.
I did like Freescale USB stack, as switched to TinyUSB.

Jan's book "USB Complete" 5th edition is worth the read if you are new to USB in general.

The forum here has formatting messed up.

#define BDT_PER_EP (4U) /* 4 = (TX Odd/Even) + (RX Odd/Even) */

/*
* Every endpoint direction requires two 8-byte Buffer Descriptor (BD)
* entries. This part is Little Endian.
*/
typedef struct BDT
{
uint8_t bdctl_u8; /* Buffer Descriptor Control BD[ 0: 7] */
uint8_t rsvd_u8; /* Reserved: BD[ 8:15] */
uint16_t byte_count_u16; /* Byte Count. Only ten bits are used for the count. BD[16:32] */
uint8_t *addr_ptr_u8; /* Address */
} BDT;

/*
* There are:
* * 16 bidirectional end points -> 16 Rx, 16 Tx end points,
* * and there are ODD and EVEN buffer, for ping/ponging, -> 64 bdt's.
*/
static BDT bdt[( ENDPOINTS_USED * BDT_PER_EP ) ] __attribute__( ( __aligned__( 512U ) ) );
/******************************************************************************
* BUFFER DISCRIPTOR TABLE (BDT) DISCRIPTION *
******************************************************************************/
/**
* The USB-FS implements a Buffer Descriptor Table (BDT) in system memory. The
* BDT resides on a 512 byte boundary in system memory and is pointed to by the
* BDT Page Registers. Every endpoint direction requires two eight-byte Buffer
* Descriptor entries.Therefore, a system with 16 fully bidirectional endpoints
* would require 512 bytes of system memory to implement the BDT.The two Buffer
* Descriptor (BD) entries allows for an EVEN BD and ODD BD entry for each
* endpoint direction. This allows the microprocessor to process one BD while
* the USB-FS is processing the other BD. Double buffering BDs in this way
* allows the USB-FS to easily transfer data at the maximum throughput provided
* by USB.
*
* Because the buffers are shared between the microprocessor and the USB-FS a
* simple semaphore mechanism is used to distinguish who is allowed to update
* the BDT and buffers in system memory. A semaphore bit, the OWN bit, is
* cleared to 0 when the BD entry is owned by the microprocessor. The
* microprocessor is allowed read and write access to the BD entry and the
* buffer in system memory when the OWN bit is 0.
* When the OWN bit is set to 1, the BD entry and the buffer in system memory
* are owned by the USB-FS. The USB-FS now has full read and write access and
* the microprocessor should not modify the BD or its corresponding data buffer.
* The BD also contains indirect address pointers to where the actual buffer
* resides in system memory.
******************************************************************************
* BUFFER DISCRIPTOR FORMAT DISCRIPTION
******************************************************************************
* The Buffer Descriptors have different meaning based on who is reading the BD
* in memory. The USB-FS Controller uses the data stored in BDs to determine:
*
* # Who owns the buffer in system memory
* # Data0 or Data1 PID
* # Release Own upon packet completion
* # No address increment (FIFO Mode)
* # Data toggle synchronization enable
* # How much data is to be transmitted or received
* # Where the buffer resides in system memory
*
* While the microprocessor uses the data stored in the BDs to determine:
* # Who owns the buffer in system memory
* # Data0 or Data1 PID
* # The received TOKEN PID
* # How much data was transmitted or received
* # Where the buffer resides in system memory
*
* ------ ------ ------ ------ -------- ---------- ---------- ---------- ---------- ---------- ----------
* |31-26 |25-16 | 15-8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
* |RSVD | BC | RSVD | OWN |DATA0/1 |TOK_PID[3]|TOK_PID[2]|TOK_PID[1]|TOK_PID[0]|TOK_PID[n]| reserved |
* ------ ------ ------ ------ -------- ---------- ---------- ---------- ---------- ---------- ----------
* | ADDRESS[31--0] |
* | |
* -------------------------------------------------------------------------------------------------------
*/

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758 Views
jh0
Contributor IV

Hi Bob,

Some KL27 models are with dedicated USB RAM, some KL27 are without dedicated USB RAM. Don't remember if this information can be found inside device datasheet. But it should be in MCUXpresso device (exp board) memory tab.

I used custom board  with KL27Z64 that have dedicated USB RAM, and CDC example for related exp board was working fine. 

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