Too High Sleep current with RTC

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Too High Sleep current with RTC

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astdom01
Contributor III

Hi all

I measure a power cunsumption of about 2-3 uA without RTC when ti uC is in LLS-Mode ( measured on J4, FRDM-KL25Z ). As soon as I have the RTC running the current consumption is about 23-24 uA. I see in the datasheet that I_RTC should be between 432 and 810 nA - much smaller then 20 uA. If I dont have the RTC-Clock connected to PTC1 the current consumption is ok even if the RTC-Module is enabled.

Does anyone know what is wrong here?

Thank you for any hint .. Dominic

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astdom01
Contributor III

It is probably a hardware issue. My RTC-Clock signal is not very nice (but event not very bad!). Having a nice clock generated by a Clock-Generator I dont measure the current penalty anymore. So my problem is basically solved but if anyone knows why the bad clock signal results in an increased current consumptin I am very interested in!

Thank you all! Dominic

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astdom01
Contributor III

Hm, I see that the RTC component is not required for the high power consumption. As soon as I have RTC clock input enabled and I have a 32.768 kHz clock attached to PTC1 the power consomption in LLS-Mode jumps from 2-3 uA to 23-24 uA. I dont see why :-( Does anyone know?

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egoodii
Senior Contributor III

Can we assume that you have the 32K oscillator section set to the 'lowest power' oscillation mode?

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astdom01
Contributor III

I fear you cant and I cant Event find the Settings you wrote - but it sounds interesting! Can you tell me where I find it? Here are my CPU Settings.

Thanks! Dominic

cpu_settings.png

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astdom01
Contributor III

It is probably a hardware issue. My RTC-Clock signal is not very nice (but event not very bad!). Having a nice clock generated by a Clock-Generator I dont measure the current penalty anymore. So my problem is basically solved but if anyone knows why the bad clock signal results in an increased current consumptin I am very interested in!

Thank you all! Dominic

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egoodii
Senior Contributor III

I take it from this you have an external 32KHz clock source, NOT the internal oscillator.  In that case, you must insure that the digital input signal spends 'limited' time at any significant voltage 'away from the rails', as like any CMOS input middling voltages incur significant shoot-thru current in the input buffer.  I wouldn't be surprised to see something on the order of 100uA at dead-center (Vbat/2).

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astdom01
Contributor III

My Clock Signal is dirty because PTC1 is internally connected to the OpenSDA INTERFACE ( SDA_PTD6 ) on the KL25Z Board Rev. E. Removing resistor R24 ( 0 Ohm ) solves the issue. Does anyone know why it is connected to OpenSDA and if it is a Problem to remove R24?

Thanx! Dominic

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