Tamper detection during chip power-down

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Tamper detection during chip power-down

Contributor II

Hi NXP support,

The part being used is MK21FN1M0AVMC12.

We've observed an odd behaviour with our production unit which is likely related to a tamper pin being triggered during chip power off. Only the DryIce module is powered from a coin cell. I've been conducting some experiments with the DryIce code and deliberately triggered a tamper pin to detect a tamper pulse event but haven't any success.

When the unit powered up, the tamper pin flag can be seen in DryIce Status Register. However, when the tamper pin is pulled out of its expected value, then, after a short duration, brought back to its correct value (mimicking a tamper pulse), the tamper pin flag is not set in the Status Register. It is done entirely by hardware.

It it not mentioned in the Reference Manual or the DryIce App Note what happens to the Tamper Flag on a tamper event during power-down.

Is it possible that a tamper event can be detected during power-down using the DryIce Status Register?

Best wishes,

Kevin Le Dinh

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