sito
I am working on USB HS (Device) on TWRK70F120M (Rev C) + TWR-SER2 boards. I have done following settings/configurations
TWR-K70F120M: No Jumper on J18 and J19. Other jumpers are at default settings
TWR-SER2: No Jumper on J16, J21 and J24. Other jumpers are at default settings
Power Supply: From Primary Elevator, SW1 switch is at "USB" Position. i.e. 1-2. Other jumpers are at default settings
Did following initialization
WRITE32(LMEM_PCCCR, READ32(LMEM_PCCCR) & (~LMEM_PCCCR_ENCACHE_MASK)); /* Disable cache */
WRITE32(SIM_SCGC7, READ32(SIM_SCGC7) | (4) ); /* Enable MPU */
WRITE32(AXBS_PRS1, (UINT32) 0x70543216UL); /* Increase priority for usb module */
WRITE32(MPU_CESR, READ32(MPU_CESR) & 0xFFFFFFFE); /* Disable the MPU to allow USB to access memory */
WRITE32(SIM_CLKDIV2, READ32(SIM_CLKDIV2) | USBHS_FRAC | SIM_CLKDIV2_USBHSDIV(1) ); /* Set Clock Dividers for USB High Speed OTG (Divide reference clock to obtain 60MHz) */
WRITE32(SIM_SOPT2, READ32(SIM_SOPT2) | (SIM_SOPT2_USBHSRC)); /* Selects the clock source before clock divider for the USB 60 MHz clock (MCGPLL0CLK Clock is selected) */
WRITE32(SIM_MCR, READ32(SIM_MCR) | (SIM_MCR_ULPICLKOBE) ); /* Provide Interanl generated 60MHz ULPI clock to external ULPI PHY */
WRITE32(SIM_SCGC6, READ32(SIM_SCGC6) | (SIM_SCGC6_USBHS) ); /* Enable USB High Speed OTG Clock */
/* Set ULPI_CLK, ULP_NXT, ULP_STP, ULP_DIR and ULPI_DATA 0-7 at PORTA 6-11 and 24-29 on ALT 2 mode*/
Can you please verify these settings/configurations?
Is there any demo (Host and Device) to be tested on this board?
Regards