TRK-KEAXXX example code, LAB 3: ADC clock

[alanto]

Hi,

I am starting to get acquainted with the kenetis KEA series MCU, I have never touched the kenetis stuff before but I have alot of experience with other platforms. The ADC performance is very important to me so I decided to follow the example code for LAB 3 which is the ADC example for Codewarrior. I am using the TRK-KEA64 demo board.

It seems to me that the the ADCK is 20mhz which taken straight from the Bus Clock that is 20Mhz without any dividers in between. From reading the KEA64 Sub-Family Data Sheet, the max ADCK is 8mhz. So what am I missing?

Any clarification would be greatly appreciated.

Regards,

Alan To

[jeremyzhou]

Hi Alan,

According to the Fig1, you can find that the Bus clock is not only work as the Bus interface clock to support the system peripheral modules, but also can be internal clock source of the ADC module.

And as the internal clock source of the ADC module, it's maximal frequency can't exceed the 8 MHz.

Have a great day,
Ping

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------