Strange behaviour of KL25 ADC0

[wolfgangdietz]

Hi everybody@ freescale community,

we are using K- and KL-line Kinetis MCUs since a short time and are really enthusiastic about the possibilities, esp. the 16-bit AD converter .

Unfortunately we ran into a problem with the KL25 (MKL25Z128VFM4) we could not solve despite of several days of testing code variations. Due to the Family Reference Manual the ADC should be able to convert 2 input signals using SC1A and SC1B register in the "Ping-Pong-mode" described. But - whatever we configure, only the input specified in SC1A is converted.   We used Processor Expert for code generation of the ADC test code only, configured and selected static sample groups and used PIT HW triggering.

By the way- PE obviously generates buggy code since the AIEN bit is not set for the first channel (SC1A), which leads to no triggering at all. Defining a single channel sample group works correctly.

But back - has anyone an idea what could be missing in our (PE´s) code to get the two channel being converted "Ping-Pong" like?

Many thanks to all Kinetis enthusiasts in advance for clearing the fog.

Wolfgang.

[Hui_Ma]

Hi Wolfgang,

Please check attached code, which is based on FRDM_KL25Z board using CodeWarrior with Processor Expert tool, which is using TPM module to trigger ADC A&B to realize the ADC ping-pong conversion mode.

Wish it helps.

B.R.

Ma Hui

[wolfgangdietz]

Hi  Hui,

many thanks for your answer and the code you provided.

I tested it and it is comprehensible that one can trigger the two conversions using SC1A and SC1B with two timer channels independently.

My approach was to use PIT triggering and, following the description on page 463 of the Sub Family Manual, assuming an automatic pingpong (switch) between SC1A and SC1B trigger by trigger or in one cycle after triggering.

I´m afraid that was a misinterpretation on my side (or mistakable by the document :-)).

Would you agree?

Once again thanks.

B. R

Wolfgang

[Hui_Ma]

Hi Woflgang,

If use PIT as hardware trigger source, there (PIT) only could trigger  ADC0 A or B. Not both.

Thank you for the attention.

B.R.

Ma Hui