Schematic Review

[christopherhuds]

Attached is my schematic for MK20FN1M0VLQ12.  Can someone check it for me to see if I missed something? Is power correct? Oscillator, SPI, and especially JTAG for use with the P&E wiggler?

The intent is 4 analog inputs using all 4 converters (PTB0, PTB1, PTE8,PTE11)

Using all 3 SPI buss SPI0 (memory), SP1(left DAC), SP2 (right DAC) <--I want parallelism on DAC loads instead of sequential and memory to hold my code (which is larger than on-chip memory)

Using JTAG port for use with: P&E Microcomputer Systems - USB Multilink Universal FX - USB Multilink Universal FX All-In-One Devel...

Various GPIO's & RTC will be used.

[jeremyzhou]

Hi Christopher,

After had a brief look through the statement above, I've found out two places that need to fix.

1. The 12 MHz on-board clock oscillator should connect the EXTAL0 instead of the XTAL0.

2. Please refer to the attachment to design the debug interface.
Have a great day,
Ping

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[mjbcswitzerland]

Christopher

You need to connect the 12MHz external oscillator to EXTAL and not XTAL.

Could you expain the bit about the code in the external SPI Flash? Will you be loading parts of it into RAM and running it there (since code can't be run directly from SPI flash)?

Regards

Mark

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[christopherhuds]

yes, thanks for reviewing.

there will either be a bootloader on-chip that will load code from memory as it needs OR my code will be on-chip.  The "big" portion i refer to is some audio warnings that are played for various modes that the processor will encounter.  hopefully my code port can stay relatively small so it will fit in memory.