Respecting RUN Mode clock limits

[ac80]

Hello all, 

I've just noticed something interesting in one of our projects using a custom board with the MKV31F256 chips: we're changing from HSRUN mode to RUN mode without actually decreasing our clock speeds appropriately. 

We run normally in HSRUN mode at 120M, 60M, 30M, 24M Core/Bus/Flex/Flash clocks. 

When we write to flash, we change modes from HSRUN to RUN mode. It looks like our code intends to reduce the clocks to 60M, 30M, 20M, 20M, but there is a mistake in the write to SIM->CLKDIV1 and that setting never takes. 

Instead what we get apparently is that we're keeping the divider the same, and then successfully switching modes. The result is that we're running RUN mode at 120M core and 60 M bus clocks, which exceed the stated maximums of 80 M and 50 M. 

Moving forward, this is something we'll fix obviously, but I was wondering if anyone can answer: 

1. Is there nothing in the SIM that prevents switching to RUN mode with illegal clock speeds? 

2. What is the risk of running in RUN mode with a core clock of 120 M which exceeds the specified max of 80 M, and a system clock of 60 M which exceeds the spec of 50 M? 

Thanks to anyone that can share some experience with us! 

[xiangjun_rong · Accepted solution]

Hi,

As you know that KV31 has two derivatives, one is MKV31F128VLL10, which is 100mhz for core/system clock. Another is MKV31F256VLH12 , which is 120mhz for core/system clock.

This is MKV31F128VLL12 clock configuration:

If you set the chip in normal RUN mode with core/system/Bus/Flash clock as 120/120/60/30Mhz, it is possible that the silicon can run normally because of spec tolerance, but  from long time running perspective and reliablity, there is issue. We suggest you follow up the clock spec for each run mode.

Hope it can help you

BR

XiangJun Rong