Recover from low-voltage warning?

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Recover from low-voltage warning?

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indraastra
Contributor II

I was very happy to see that the low voltage detection (LVD) module in my Kinetis K device provides a low-voltage warning interrupt. My goal is to use this to mitigate software corruption of an SD card in the event of an abrupt power loss by entering a low-power sleep mode when the warning interrupt fires.

What I would like is to avoid a situation where a voltage blip causes the CPU to enter sleep mode without any chance of waking up. I am wondering if the LVD module gives you any mechanism for recovering from a low-voltage warning that eventually goes away, i.e. a false alarm. I see that the LVD is disabled in any of the LLS states, so this seems difficult to do using the LVD itself.

Basically, what I want to do is pause the core while the voltage is in a questionable state (low-voltage warning) and resume it when a normal voltage level is reached again.

I am using the MK20DX256 MCU.

Thanks!

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Hui_Ma
NXP TechSupport
NXP TechSupport

MK20 provides LLWU module as wake up module for LLS low power mode.

And CMP module can works in LLS low power mode and its' interrupt as one of LLWU wake up source. There could use the CMP module to wake up chip from LLS mode.

There need to use two CMPn_INn pins, one connect external refer voltage as normal voltage level, and the other connects VDD. When there with a rising edge will wake up the chip from LLS mode.

It could use LVD(low-voltage warning) to let chip enter into LLS low power mode.


Wish it helps.
best regards
Ma Hui

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Hui_Ma
NXP TechSupport
NXP TechSupport

MK20 provides LLWU module as wake up module for LLS low power mode.

And CMP module can works in LLS low power mode and its' interrupt as one of LLWU wake up source. There could use the CMP module to wake up chip from LLS mode.

There need to use two CMPn_INn pins, one connect external refer voltage as normal voltage level, and the other connects VDD. When there with a rising edge will wake up the chip from LLS mode.

It could use LVD(low-voltage warning) to let chip enter into LLS low power mode.


Wish it helps.
best regards
Ma Hui

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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indraastra
Contributor II

Thanks, Ma. Using LLWU sounds like an option if I can get a voltage reference decoupled from the falling voltage to begin with.

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