Hi,
Because of the chip shortage we had to switch from the MK26FN2M0VLQ18 to the MK24FN2M0VDC12. As we ported our software across we ended up with an incredibly odd problem whereby we get hard faults caused by an LDR instruction not executing properly (was able to pinpoint the address and behavior) and also other, more random, hard faults.
When reducing the flash clock from 24MHz to 20MHz, these problems stopped. ADC readings also seem to be significantly noisier than on the previous chip, now requiring averaging.
Is there anything logical that would explain this behavior? Or any way to confirm the flash clock was indeed running at 24MHz and not at a higher speed?
Thanks!