Good morning,
I want to use the Seeger J-Link plus to debug the MK66FN2M8VMD18 on my FRDM-K66F evaluation board via the SWD debug interface. This interface consists of two signals SWDIO and SWCLK. Unfortunately your wording used in the schematic SPF-28682_REV B.pdf does not correspond to the standard. There are the signals SWD_SDA_TGTMCU, TRACE_SWO, JTAG_TDO/TRACE_SWO/EZP_DO/FTM0_CH7. Which of these signals correspond to the standard SWD signals. I attached the error report additionally. An experienced user could probably detect the fault.
Hello @ChristofAbt,
PTA0 and PTA3 corresponds to SWD standard signals:
And are used in the SDW connector:
These are designed to support JTAG and SWD, also, as mentioned in the chapter 3.2 called "Series and debug adapter (OpenSDAv2.1)" in the Freedom FRDM-K66F Development Platform User’s Guide. These signals are also brought out to a standard 10-pin (0.05”) Cortex Debug connector (J9). I highly recommend see this chapter in order to obtain more information.
BR
Habib
Thanks for the quick reply but please use the naming standards in your schematics.
Best regards Christof
Hello again @ChristofAbt,
Thank you for the feedback, I will share the comments to the hardware design team. So, they can deliberate about the addition of this on a future.
BR
Habib.