Referring to the RM:
The FlexCAN module has two clock domains asynchronous to each other:
• The Bus Domain feeds the Control Host Interface (CHI) submodule and is derived
from the peripheral clock.
• The Oscillator Domain feeds the CAN Protocol Engine (PE) submodule and is
derived directly from a crystal oscillator clock, so that very low jitter performance
can be achieved on the CAN bus.
So the ref clock for PE has restriction on jitter, while FLL has a much larger jitter than PLL at the max clock frequency.

so we recommend use PLL or the crystal oscillator clock for PE's source clock, sorry for the inconvenience that has caused.