PGA features on MK20DX256VLH7

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PGA features on MK20DX256VLH7

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pgo
Senior Contributor V

Hi,

I'm have a couple of questions about the PGA on the MK20DX256VLH7.

1. PGA Chop Feature

According to the Reference Manual section 31.3.18 ADC PGA Register (ADCx_PGA) the chip doesn't have the PGAOFSM and PGACHPb fields.

There is a section 6.6.1.4 16-bit ADC with PGA characteristics with Chop enabled in the Data Sheet.

Is this feature only available in some versions of this chip?

2. Use of external reference with VrefOut

The data sheet and reference manual indicate that it is possible to use an external reference applied to VrefOut with the internal reference disabled.  It is unclear to me what voltage restrictions apply to this external reference.  For example, is it possible to extend the PGA input compliance range by use of an external 3.0V reference?

 

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PabloAvalos
NXP TechSupport
NXP TechSupport

Hi, @pgo 

 

Many thanks for your patience.

 

Hoping you are well, according the Chop Feature, effectively, this PGA Registers fields are only available in the K20P144M120SF3RM variant of the chip Kinetis K20 Series.

Then, about your question regarding the external reference with VrefOut, this VREF can be used for a maximum of 1.2V using an external reference and having internal reference (VREFH and VREFL) disabled as you mentioned.
You can refer to this thread of our community where a similar question was done: https://community.nxp.com/t5/Kinetis-Microcontrollers/K60-ADC-Differential-without-PGA-VREFH-vs-VREF...

I am so glad to assist you if you have more questions.

 

Best Regards.

Pablo Avalos.

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