Need help to set d4dtchhw_kinetis_adc_cfg !

[joelesco]

Hi,

I'm using a K70 with CW and PE. I' m trying to drive a display with  touchscreen. The display works fine but I have some problem with the touchscreen. I'm using the D4D and my problem is at the begining of the d4dtchhw_kinetis_adc_cfg ! The exemple of the cfg made for the kinetis K60 include :

                               #define D4DTCH_X_PLUS_DDR   GPIOB_POER  // Output enable register

I was looking in the reference manual of the K60 but nothing about this GPIOB_POER  :smileyconfused: !  Couldn' be the PSOR register ?

If someone as already use D4D with the K70 to control touchscreen I will be glad to have some details about the cfg  !

thanks a lot !

[LuisCasado · Accepted solution]

Hi Jay,

This is a valid configuration for TWR-K70 + TWR-LCD. Notice that will not run without HW modifications, to route the right ADC channels to TWR-LCD. But as I understand you are using your hardware, you have to change to the right ADC channels.

  #define D4DTCH_ADC_HW D4DTCH_ADC_HW_KINETIS

  #define D4DTCH_ADC_ID 1 // Use ADC module 1

#define D4DTCH_MCU_USER_INIT {D4DTCH_X_PLUS_PCR = PORT_PCR_MUX(1) | PORT_PCR_DSE_MASK;\

                              D4DTCH_X_MINUS_PCR = PORT_PCR_MUX(1) | PORT_PCR_DSE_MASK;\

                              D4DTCH_Y_PLUS_PCR = PORT_PCR_MUX(1) | PORT_PCR_DSE_MASK;\

                              D4DTCH_Y_MINUS_PCR = PORT_PCR_MUX(1) | PORT_PCR_DSE_MASK;\

}

  // X+ wire definition 

  #define D4DTCH_X_PLUS   17

  #define D4DTCH_X_PLUS_PORT  GPIOA_PDOR  // Data output register

  #define D4DTCH_X_PLUS_DDR   GPIOA_PDDR  // Output enable register

  #define D4DTCH_X_PLUS_ADCH  17          // ADC channel number

  #define D4DTCH_X_PLUS_PCR   PORTA_PCR17

  // X- wire definition

  #define D4DTCH_X_MINUS  10       

  #define D4DTCH_X_MINUS_PORT  GPIOB_PDOR 

  #define D4DTCH_X_MINUS_DDR   GPIOB_PDDR

  #define D4DTCH_X_MINUS_PCR   PORTB_PCR10

  // Y+ wire definition

  #define D4DTCH_Y_PLUS   6     

  #define D4DTCH_Y_PLUS_PORT  GPIOB_PDOR 

  #define D4DTCH_Y_PLUS_DDR   GPIOB_PDDR

  #define D4DTCH_Y_PLUS_ADCH   12

  #define D4DTCH_Y_PLUS_PCR   PORTB_PCR6

  // Y- wire definition

  #define D4DTCH_Y_MINUS  5 

  #define D4DTCH_Y_MINUS_PORT  GPIOB_PDOR 

  #define D4DTCH_Y_MINUS_DDR   GPIOB_PDDR

  #define D4DTCH_Y_MINUS_PCR   PORTB_PCR5

  // definition of calibration cross offset on on screen in pixels

  // Constant specifying maximum ADC value for a screen touch (=12bits)

  #define D4DTCH_FULL_SCALE           0x0FFF

  // Constants specifying minimum ADC value for a screen touch

  #define D4DTCH_X_TOUCH_MIN              (D4DTCH_FULL_SCALE / 10)

  #define D4DTCH_Y_TOUCH_MIN              (D4DTCH_FULL_SCALE / 10)

  #define D4DTCH_X_TOUCH_OFFMAX              (D4DTCH_X_TOUCH_MIN * 3)

  #define D4DTCH_Y_TOUCH_OFFMAX              (D4DTCH_Y_TOUCH_MIN * 3)

Regards

[joelesco]

Thanks a lot for answering fast !

Well I did it before but still the same problem. I think maybe a don't understand something about the chanel.

I took this pins to control the touchscreen :

                         PTC8/ADC1_SE4B    /     PTC9/ADC1_SE5B    /     PTC10/ADC1_SE6B    /    PTC11/ADC1_SE7B

What mean the B after SE ?

So my definition  is :

  #define D4DTCH_X_PLUS   11

  #define D4DTCH_X_PLUS_PORT  GPIOC_PDOR  // Data output register

  #define D4DTCH_X_PLUS_DDR   GPIOC_PDDR  // Output enable register

  #define D4DTCH_X_PLUS_ADCH  7        // ADC channel number

  #define D4DTCH_X_PLUS_PCR   PORTC_PCR11

  // X- wire definition

  #define D4DTCH_X_MINUS  9       

  #define D4DTCH_X_MINUS_PORT  GPIOC_PDOR 

  #define D4DTCH_X_MINUS_DDR   GPIOC_PDDR

  #define D4DTCH_X_MINUS_PCR   PORTC_PCR9

  // Y+ wire definition

  #define D4DTCH_Y_PLUS   8     

  #define D4DTCH_Y_PLUS_PORT  GPIOC_PDOR 

  #define D4DTCH_Y_PLUS_DDR   GPIOC_PDDR

  #define D4DTCH_Y_PLUS_ADCH   4

  #define D4DTCH_Y_PLUS_PCR   PORTC_PCR8

  // Y- wire definition

  #define D4DTCH_Y_MINUS  10 

  #define D4DTCH_Y_MINUS_PORT  GPIOC_PDOR 

  #define D4DTCH_Y_MINUS_DDR   GPIOC_PDDR

  #define D4DTCH_Y_MINUS_PCR   PORTC_PCR10

Why  don't we declare ADCH for Y- and X- ?

Thanks Luis

[LuisCasado]

Hi,

They are pin definitions for K70. You can check the K70 Reference manual.

Regards,

Luis

[joelesco]

great ! I found the problem! I did'nt configure the D4DTCH_ADC_CFG2 ! I change for  D4DTCH_ADC_CFG2 = (0|ADC_CFG2_MUXSEL_MASK);

Thanks

[santiago_lopez]

Hi Jay,

The #define suggests that the register it is looking for is the Data Direction to enable the pin as an output. Did you try with GPIOB_PDDR?

Saludos