MKW01xx DIO0 and DIO1 ,,enhanced performance''

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MKW01xx DIO0 and DIO1 ,,enhanced performance''

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pkral
Contributor I

Hello,

From MKW01xx Reference Manual, Rev. 2:

4.4.1 Additional Transceiver Status Signals

The MKW01Z128 transceiver has a total of six outputs (DIO5:DIO0) that can be programmed as status  indicators:

  • DIO1 and DIO0 are connected to MCU GPIOs, PTE3 & PTE2, internally to the package. For certain software configurations, improved performance can be obtained by connecting to additional GPIOs, PTC4, and PTC3, off chip. These connections are used by applications software in packet mode.

Does it mean use of LLWU (i.e.SyncAddress, CrcOk,... ) on PTC4, PTC3 to wake up sleeping MCU when transceiver do radio RX duty cycling or anything else ?

Thanks,

Pavel

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Jorge_Gonzalez
NXP Employee
NXP Employee

Hello Pavel:

I don't know the meaning of that "improved performance", but yes, I suppose you could use those flags (SyncAddress, CrcOk, FifoFull, FifoNotEmpty, etc) as wake-up sources, as long as you configure properly the LLWU unit of the internal MCU.

Now, as for why it says specifically PTC3 and PTC4, I think this is because of the connections in the Modular Reference Boards (MRB-KW0x: Modular Reference Boards for Kinetis KW0x Family of MCUs). Check this:

DIO_0_1.png


Regards!
Jorge Gonzalez

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perlam_i_au
Senior Contributor I

It mean that if you want to use DIO1 and DIO0 in enhanced mode, you should route these signals to PTC4 & PTC3 pins, instead use them on default pins (PTE3 & PTE2).

The reason for this is explained on 8.1 LGA Package Maximum Ratings in the datasheet MKW01Z128:

This device contains circuitry protecting against damage due to high static voltage or electrical fields;

however, it is advised that normal precautions be taken to avoid application of any voltages higher than

maximum-rated voltages to this high-impedance circuit. Reliability of operation is enhanced if unused

inputs are tied to an appropriate logic voltage level (for instance, either VSS or VDD) or the programmable

pull-up resistor associated with the pin is enabled.


Have a nice day :P,
Perla

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pkral
Contributor I

Hi,

thank you for clarification, yet it is still unclear to me, why I have to route them specifically to PTC4 and PTC3 (or why not just pull them up/down internally on PTE).

Thanks,

Pavel

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