MKE16F512VLH16 FTM no PWM on some pins?

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MKE16F512VLH16 FTM no PWM on some pins?

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xxxajk
Contributor III

I have PWM working for most of the pins on the MKE16F512VLH16 on a custom board with my custom software with the exception of the following failures:

pin 19 alt2 PTB4 FTM0_CH4

FTM0_C4SC (*(volatile uint32_t *)0x4003802C)

FTM0_C4V (*(volatile uint32_t *)0x40038030)

pin 18 alt2 PTB5 FTM0_CH5

FTM0_C5SC (*(volatile uint32_t *)0x40038034)

FTM0_C5V (*(volatile uint32_t *)0x40038038)

pin 17 alt2 PTE8 FTM0_CH6

FTM0_C6SC (*(volatile uint32_t *)0x4003803C)

FTM0_C6V (*(volatile uint32_t *)0x40038040)


pin 57 alt2 PTA11 FTM1_CH5

FTM1_C5SC (*(volatile uint32_t *)0x40039034)

FTM1_C5V (*(volatile uint32_t *)0x40039038)

pin 56 alt2 PTA12 FTM1_CH6

FTM1_C6SC (*(volatile uint32_t *)0x4003903C)

FTM1_C6V (*(volatile uint32_t *)0x40039040)
pin 55 alt2 PTA13 FTM1_CH7

FTM1_C7SC (*(volatile uint32_t *)0x40039044)

FTM1_C7V (*(volatile uint32_t *)0x40039048)


pin 4 alt4 PTE10 FTM2_CH4

FTM2_C4SC (*(volatile uint32_t *)0x4003A02C)

FTM2_C4V (*(volatile uint32_t *)0x4003A030)

pin 3 alt4 PTE11 FTM2_CH5

FTM2_C5SC (*(volatile uint32_t *)0x4003A034)

FTM2_C5V (*(volatile uint32_t *)0x4003A038)

pin 46 alt2 PTD2 FTM3_CH4

FTM3_C4SC (*(volatile uint32_t *)0x4002602C)

FTM3_C4V (*(volatile uint32_t *)0x40026030)
pin 54 alt4 PTE2 FTM3_CH6

FTM3_C6SC (*(volatile uint32_t *)0x40026040)

FTM3_C6V (*(volatile uint32_t *)0x40026044)

pin 53 alt4 PTE6 FTM3_CH7

FTM3_C7SC (*(volatile uint32_t *)0x40026044)

FTM3_C7V (*(volatile uint32_t *)0x40026048)

To which I have the following question:

Is there something extra that I am missing here, or is the reference manual incorrect?

Using the pins as GPIO work totally fine, and I have triple checked the memory I/O location definitions, as shown above.

The eratta doesn't mention any problems.

1 Solution
99 Views
jingpan
NXP TechSupport
NXP TechSupport

Hi,

You set

            FTM0_SC = 0x000F0000u | FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE).

But PWMEN is from 0~7. You should set

            FTM0_SC = 0x00FF0000u | FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE

Regards,

Jing

View solution in original post

4 Replies
99 Views
jingpan
NXP TechSupport
NXP TechSupport

Hi Andrew,

Did you config these pin to PTM function? For example, in BOARD_InitPins(), if you want to use PTB4 as FTM pin , you should enable PORTB's clock and add

  PORT_SetPinMux(PORTB, 4U, kPORT_MuxAlt2);

Regards,

Jing

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xxxajk
Contributor III

Not using the SDK, but yes, I am doing the equivalent.

Here are the relevant bits in my code:

#define DEFAULT_FTM_MOD (40960 - 1)
#define DEFAULT_FTM_PRESCALE 2

init() {

FTM0_CNT = 0;

FTM1_CNT = 0;
FTM2_CNT = 0;
FTM3_CNT = 0;
FTM0_MOD = DEFAULT_FTM_MOD;
FTM1_MOD = DEFAULT_FTM_MOD;
FTM2_MOD = DEFAULT_FTM_MOD;
FTM3_MOD = DEFAULT_FTM_MOD;

FTM0_C0SC = 0x28U;
FTM0_C1SC = 0x28U;
FTM0_C4SC = 0x28U; // broken?
FTM0_C5SC = 0x28U; // broken?
FTM0_C6SC = 0x28U; // broken?

FTM1_C0SC = 0x28U;
FTM1_C1SC = 0x28U;
FTM1_C2SC = 0x28U;
FTM1_C3SC = 0x28U;

FTM1_C5SC = 0x28U; // broken?
FTM1_C6SC = 0x28U; // broken?
FTM1_C7SC = 0x28U; // broken?

FTM2_C0SC = 0x28U;
FTM2_C1SC = 0x28U;
FTM2_C2SC = 0x28U;
FTM2_C3SC = 0x28U;
FTM2_C4SC = 0x28U; // broken?
FTM2_C5SC = 0x28U; // broken?

FTM3_C0SC = 0x28U;
FTM3_C1SC = 0x28U;
FTM3_C2SC = 0x28U;
FTM3_C3SC = 0x28U;
FTM3_C4SC = 0x28U; // broken?

FTM3_C6SC = 0x28U; // broken?
FTM3_C7SC = 0x28U; // broken?

FTM0_SC = 0x000F0000u | FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE
FTM1_SC = 0x000F0000u | FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE
FTM2_SC = 0x000F0000u | FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE
FTM3_SC = 0x000F0000u | FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE

}

Then when I want to actually dynamically access any pin as pwm, I do so with a new pwm value:

switch(pin) {

case FTM0_CH0_PIN:
FTM0_C0V = cval;
FTM_PINCFG(FTM0_CH0_PIN) = PORT_PCR_MUX(2) | PORT_PCR_DSE | PORT_PCR_SRE;
break;
case FTM0_CH1_PIN:
FTM0_C1V = cval;
FTM_PINCFG(FTM0_CH1_PIN) = PORT_PCR_MUX(2) | PORT_PCR_DSE | PORT_PCR_SRE;
break;

case FTM0_CH4_PIN:
FTM0_C4V = cval;
FTM_PINCFG(FTM0_CH4_PIN) = PORT_PCR_MUX(2) | PORT_PCR_DSE | PORT_PCR_SRE;
break;
case FTM0_CH5_PIN:
FTM0_C5V = cval;
FTM_PINCFG(FTM0_CH5_PIN) = PORT_PCR_MUX(2) | PORT_PCR_DSE | PORT_PCR_SRE;
break;

[SNIP!]...

}

I think you get the idea... yes, I'm selecting the correct ALT pin setting, etc.

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100 Views
jingpan
NXP TechSupport
NXP TechSupport

Hi,

You set

            FTM0_SC = 0x000F0000u | FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE).

But PWMEN is from 0~7. You should set

            FTM0_SC = 0x00FF0000u | FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE

Regards,

Jing

View solution in original post

99 Views
xxxajk
Contributor III

Thank you so much! This was driving me crazy. I knew it had to be something simple that I overlooked.

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