MKE02z issue using SWD_CLK as GPIO

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MKE02z issue using SWD_CLK as GPIO

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257 次查看
PabloBajista
Contributor I

Hi.

 

I made a custom PCB with a MKE02Z32VLD2 (44 pins), and I need to use SWD_CLK and SWD_DIO as GPIO, which are PTC4 and PTA4 respectively.

 

The MCU halts at power-up. If I left unconnected PTC4, the MCU works perfectly, so I suspect the problem is a transient while power-up sequence, which produce noise on PTC4 before  enable PTA4 and PTC4 as GPIO with the next code:

 

SIM->SOPT &= ~(uint32_t)SIM_SOPT_SWDE_MASK;

 

MCU interprets this as a failed attempt to connect the debugger, and because that MCU halts.

 

The problem is really I don’t know how to fix it. Before this, I had another issue like this with PTB4 pin, which behaves as NMI by default but I needed to us it as GPIO. MCU halted, so I found the solution in the next topic:

 

https://community.nxp.com/t5/Kinetis-Microcontrollers/powering-up-issue-on-MKE02Z-GPIO/m-p/544613#M3...

 

But in my case, I have no idea how to fix this issue. Anyone could help me, please?

 

Thanks.

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181 次查看
Celeste_Liu
NXP Employee
NXP Employee

Hello @PabloBajista ,

Thanks for your post.

First it's not recommended due to it will effect SWD function when you want to debug it again.
You may need to recover it by specify method: Bricking and Recovering FRDM-KL25Z Boards: Reset, SWD Clock and Low Power

In addition, where did you put the code below?

SIM->SOPT &= ~(uint32_t)SIM_SOPT_SWDE_MASK;

Software:

SWDE is not write‑once, but it is also enabled by default after a reset, and requires software to clear it at the earliest stage. Please modify the startup code or early initialization to clear the SWDE bit in SIM_SOPT before any other GPIO configurations. This disables the SWD function immediately, preventing the MCU from responding to noise on PTC4/PTA4.

Hardware: 

I recommend you add a 10~47kΩ pull-down resistor to PTC4 (SWD_CLK) on the PCB. This stabilizes the pin level during power-up, reducing false SWD triggers. Add 47–100 pF to ground to form an RC filter if necessary, optimize the wiring and interference isolation.

You can also clear PORT_PUEL[PTCPE4] to 0.

Celeste_Liu_0-1763538977122.png

Hope it helps.

BR

Celeste

 

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在原帖中查看解决方案

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182 次查看
Celeste_Liu
NXP Employee
NXP Employee

Hello @PabloBajista ,

Thanks for your post.

First it's not recommended due to it will effect SWD function when you want to debug it again.
You may need to recover it by specify method: Bricking and Recovering FRDM-KL25Z Boards: Reset, SWD Clock and Low Power

In addition, where did you put the code below?

SIM->SOPT &= ~(uint32_t)SIM_SOPT_SWDE_MASK;

Software:

SWDE is not write‑once, but it is also enabled by default after a reset, and requires software to clear it at the earliest stage. Please modify the startup code or early initialization to clear the SWDE bit in SIM_SOPT before any other GPIO configurations. This disables the SWD function immediately, preventing the MCU from responding to noise on PTC4/PTA4.

Hardware: 

I recommend you add a 10~47kΩ pull-down resistor to PTC4 (SWD_CLK) on the PCB. This stabilizes the pin level during power-up, reducing false SWD triggers. Add 47–100 pF to ground to form an RC filter if necessary, optimize the wiring and interference isolation.

You can also clear PORT_PUEL[PTCPE4] to 0.

Celeste_Liu_0-1763538977122.png

Hope it helps.

BR

Celeste

 

--------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the "ACCEPT AS SOLUTION" button. Thank you!
--------------------------------------------------------------------------------------------------------------------

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101 次查看
PabloBajista
Contributor I

Hi, Celeste.

 

As you suggested, I added a 33k pull-down resistor, and put the code at the beginning of startup (I had put it in the main, and not at the beginning precisely), and the code works perfectly in standalone mode.

I had already cleaned PORT_PUEL[PTCPE4] to 0.

 

Thanks a lot!

 

Pablo

 

 

69 次查看
Celeste_Liu
NXP Employee
NXP Employee

Glad to hear that. Any new issues, welcome to create a new post.

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%3CLINGO-SUB%20id%3D%22lingo-sub-2205268%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3EMKE02z%20%E5%B0%86%20SWD_CLK%20%E7%94%A8%E4%BD%9C%20GPIO%20%E7%9A%84%E9%97%AE%E9%A2%98%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-2205268%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CP%3E%E4%BD%A0%E5%A5%BD%E3%80%82%3C%2FP%3E%3CBR%20%2F%3E%3CP%3E%E6%88%91%E7%94%A8%20MKE02Z32VLD2%EF%BC%8844%20%E5%BC%95%E8%84%9A%EF%BC%89%E5%AE%9A%E5%88%B6%E4%BA%86%E4%B8%80%E4%B8%AA%20PCB%EF%BC%8C%E9%9C%80%E8%A6%81%E4%BD%BF%E7%94%A8%20SWD_CLK%20%E5%92%8C%20SWD_DIO%20%E4%BD%9C%E4%B8%BA%20GPIO%EF%BC%8C%E5%AE%83%E4%BB%AC%E5%88%86%E5%88%AB%E6%98%AF%20PTC4%20%E5%92%8C%20PTA4%E3%80%82%3C%2FP%3E%3CBR%20%2F%3E%3CP%3EMCU%20%E5%9C%A8%E4%B8%8A%E7%94%B5%E6%97%B6%E5%81%9C%E6%AD%A2%E3%80%82%E5%A6%82%E6%9E%9C%E6%88%91%E4%B8%8D%E8%BF%9E%E6%8E%A5%20PTC4%EF%BC%8C%E5%8D%95%E7%89%87%E6%9C%BA%E5%B0%B1%E8%83%BD%E6%AD%A3%E5%B8%B8%E5%B7%A5%E4%BD%9C%EF%BC%8C%E5%9B%A0%E6%AD%A4%E6%88%91%E6%80%80%E7%96%91%E9%97%AE%E9%A2%98%E5%87%BA%E5%9C%A8%E4%B8%8A%E7%94%B5%E8%BF%87%E7%A8%8B%E4%B8%AD%E7%9A%84%E7%9E%AC%E6%80%81%E7%94%B5%E5%8E%8B%E4%B8%8A%EF%BC%8C%E5%AE%83%E5%9C%A8%20PTC4%20%E4%B8%8A%E4%BA%A7%E7%94%9F%E4%BA%86%E5%99%AA%E5%A3%B0%EF%BC%8C%E7%84%B6%E5%90%8E%E6%89%8D%E7%94%A8%E4%B8%8B%E4%B8%80%E6%AE%B5%E4%BB%A3%E7%A0%81%E5%90%AF%E7%94%A8%20PTA4%20%E5%92%8C%20PTC4%20%E4%BD%9C%E4%B8%BA%20GPIO%EF%BC%9A%3C%2FP%3E%3CBR%20%2F%3E%3CP%3ESIM-%26gt%3BSOPT%26amp%3B%3D%20~(uint32_t)SIM_SOPT_SWDE_MASK%EF%BC%9B%3C%2FP%3E%3CBR%20%2F%3E%3CP%3EMCU%20%E5%B0%86%E6%AD%A4%E8%A7%A3%E9%87%8A%E4%B8%BA%E8%BF%9E%E6%8E%A5%E8%B0%83%E8%AF%95%E5%99%A8%E7%9A%84%E5%B0%9D%E8%AF%95%E5%A4%B1%E8%B4%A5%EF%BC%8C%E5%9B%A0%E6%AD%A4%20MCU%20%E5%81%9C%E6%AD%A2%E8%BF%90%E8%A1%8C%E3%80%82%3C%2FP%3E%3CBR%20%2F%3E%3CP%3E%E9%97%AE%E9%A2%98%E6%98%AF%E6%88%91%E7%9C%9F%E7%9A%84%E4%B8%8D%E7%9F%A5%E9%81%93%E5%A6%82%E4%BD%95%E8%A7%A3%E5%86%B3%E3%80%82%E5%9C%A8%E6%AD%A4%E4%B9%8B%E5%89%8D%EF%BC%8C%E6%88%91%E5%9C%A8%20PTB4%20%E5%BC%95%E8%84%9A%E4%B8%8A%E9%81%87%E5%88%B0%E8%BF%87%E7%B1%BB%E4%BC%BC%E9%97%AE%E9%A2%98%EF%BC%8C%E8%AF%A5%E5%BC%95%E8%84%9A%E9%BB%98%E8%AE%A4%E4%B8%BA%20NMI%EF%BC%8C%E4%BD%86%E6%88%91%E9%9C%80%E8%A6%81%E5%B0%86%E5%85%B6%E7%94%A8%E4%BD%9C%20GPIO%E3%80%82MCU%20%E5%81%9C%E6%AD%A2%E8%BF%90%E8%A1%8C%EF%BC%8C%E5%9B%A0%E6%AD%A4%E6%88%91%E5%9C%A8%E4%B8%8B%E4%B8%80%E4%B8%AA%E4%B8%BB%E9%A2%98%E4%B8%AD%E6%89%BE%E5%88%B0%E4%BA%86%E8%A7%A3%E5%86%B3%E6%96%B9%E6%A1%88%EF%BC%9A%3C%2FP%3E%3CBR%20%2F%3E%3CP%3E%3CA%20href%3D%22https%3A%2F%2Fcommunity.nxp.com%2Ft5%2FKinetis-Microcontrollers%2Fpowering-up-issue-on-MKE02Z-GPIO%2Fm-p%2F544613%23M33261%22%20target%3D%22_blank%22%3Ehttps%3A%2F%2Fcommunity.nxp.com%2Ft5%2FKinetis-Microcontrollers%2Fpowering-up-issue-on-MKE02Z-GPIO%2Fm-p%2F544613%23M33261%3C%2FA%3E%3C%2FP%3E%3CBR%20%2F%3E%3CP%3E%E4%BD%86%E5%B0%B1%E6%88%91%E8%80%8C%E8%A8%80%EF%BC%8C%E6%88%91%E4%B8%8D%E7%9F%A5%E9%81%93%E5%A6%82%E4%BD%95%E8%A7%A3%E5%86%B3%E8%BF%99%E4%B8%AA%E9%97%AE%E9%A2%98%E3%80%82%E8%B0%81%E8%83%BD%E5%B8%AE%E5%B8%AE%E6%88%91%EF%BC%9F%3C%2FP%3E%3CBR%20%2F%3E%3CP%3E%E8%B0%A2%E8%B0%A2%E3%80%82%3C%2FP%3E%3C%2FLINGO-BODY%3E%3CLINGO-LABS%20id%3D%22lingo-labs-2205268%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CLINGO-LABEL%3EKinetis%20E%E7%B3%BB%E5%88%97MCU%3C%2FLINGO-LABEL%3E%3C%2FLINGO-LABS%3E%3CLINGO-SUB%20id%3D%22lingo-sub-2249911%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%20translate%3D%22no%22%3ERe%3A%20MKE02z%20issue%20using%20SWD_CLK%20as%20GPIO%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-2249911%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CP%3E%E5%BE%88%E9%AB%98%E5%85%B4%E5%90%AC%E5%88%B0%E8%BF%99%E4%B8%AA%E6%B6%88%E6%81%AF%E3%80%82%E5%A6%82%E6%9C%89%E4%BB%BB%E4%BD%95%E6%96%B0%E9%97%AE%E9%A2%98%EF%BC%8C%E6%AC%A2%E8%BF%8E%E5%88%9B%E5%BB%BA%E6%96%B0%E5%B8%96%E3%80%82%3C%2FP%3E%3C%2FLINGO-BODY%3E%3CLINGO-SUB%20id%3D%22lingo-sub-2249571%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%20translate%3D%22no%22%3ERe%3A%20MKE02z%20issue%20using%20SWD_CLK%20as%20GPIO%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-2249571%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CP%3E%E5%97%A8%EF%BC%8C%E5%A1%9E%E8%8E%B1%E6%96%AF%E7%89%B9%E3%80%82%3C%2FP%3E%3CBR%20%2F%3E%3CP%3E%E6%AD%A3%E5%A6%82%E4%BD%A0%E6%89%80%E5%BB%BA%E8%AE%AE%E7%9A%84%E9%82%A3%E6%A0%B7%EF%BC%8C%E6%88%91%E6%B7%BB%E5%8A%A0%E4%BA%86%E4%B8%80%E4%B8%AA%2033k%20%E7%9A%84%E4%B8%8B%E6%8B%89%E7%94%B5%E9%98%BB%EF%BC%8C%E5%B9%B6%E5%9C%A8%E5%90%AF%E5%8A%A8%E5%BC%80%E5%A7%8B%E6%97%B6%E6%8A%8A%E4%BB%A3%E7%A0%81%E6%94%BE%E5%88%B0%E4%B8%BB%E7%94%B5%E9%98%BB%E5%99%A8%E9%87%8C%EF%BC%88%E6%88%91%E6%8A%8A%E5%AE%83%E6%94%BE%E5%9C%A8%E4%BA%86%E4%B8%BB%E7%95%8C%E9%9D%A2%EF%BC%8C%E8%80%8C%E4%B8%8D%E6%98%AF%E4%B8%80%E5%BC%80%E5%A7%8B%E7%9A%84%E6%97%B6%E5%80%99%EF%BC%89%EF%BC%8C%E4%BB%A3%E7%A0%81%E5%9C%A8%E7%8B%AC%E7%AB%8B%E7%BB%84%E7%BD%91%20(SA)%20%E6%A8%A1%E5%BC%8F%E4%B8%8B%E8%BF%90%E8%A1%8C%E8%89%AF%E5%A5%BD%E3%80%82%3C%2FP%3E%3CP%3E%E6%88%91%E5%B7%B2%E7%BB%8F%E5%B0%86%20PORT_PUEL%5BPTCPE4%5D%E6%B8%85%E9%9B%B6%E3%80%82%3C%2FP%3E%3CBR%20%2F%3E%3CP%3E%E9%9D%9E%E5%B8%B8%E6%84%9F%E8%B0%A2%EF%BC%81%3C%2FP%3E%3CBR%20%2F%3E%3CP%3E%E5%B7%B4%E5%8B%83%E7%BD%97%3C%2FP%3E%3CBR%20%2F%3E%3CBR%20%2F%3E%3C%2FLINGO-BODY%3E