MK60 MCG initialization Issue

[Makabaka]

Dears:

In the MK60 power on, power off test, the program will be stuck in the PLL status bit judgment.Please help to see if there is any solution.

Test conditions: power off for 5 seconds, power on for 30 seconds, there will be a certain probability of MK60 can not start normally.

Test PN: MK60DN512ZVLQ10

Problem tracking: through software positioning, found that the chip will be stuck at the clock module initialization, the specific location:Unable to switch from FLL to PLL at PLLST determination.

Additional tests:

Remove the repeated SystermInit () driver called in boot and APP. only run SystermInit ()  once at main()  in boot code. And tested on different project boards.

1: After SystermInit () is completed, reset the MCU by software and repeat the test several times.

2: Repeat SystermInit () using the While (1) loop in main().

Both tests fail to start properly and are stuck at PLLST judgment.

Other tests: Power supply is stable, external crystal oscillator 50M is normal.  And enabled LOCRE0 function , but the problem remains.

Looking forward to your reply! Thanks

Ziv

[myke_predko]

@Makabaka 

Could I suggest that you use the MCUXpresso Clock Wizard rather than try to generate your own clock initialization files? 

I know it's somewhat cranky, but if you can get your configuration with your crystal/clock options the desired clock speeds without any errors then it will generate the correct clock initialization files. 

myke

[Omar_Anguiano]

Hello Ziv5

Thank you for your interest in NXP Semiconductor products and the opportunity to serve you. My name is Omar and I will gladly help you with this.
I suggest you to use the SDK to initialize the MCG, there you can find examples. Also the Config tool might be useful.

This figure shows the permitted transitions between the MCG states:

Let me know if this is helpful, if you have more questions do not hesitate to ask me.
Best regards,
Omar

[Makabaka]

Hi Omar: The MCG mode conversion satisfies this figure. Now our problem is that after setting the PLLS bit of the MCG_C6 register to 1 in the MCG initialization, the PLLST bit of the MCG_S is not set to 1.As a result, our program is stuck at the judgment PLLST==1. The probability of this problem is very low, about a few times in thousand , and not fixed. And It doesn't happen every time when reset. Please give some suggestions,.Thanks

[Omar_Anguiano]

I suggest you to use the function "CLOCK_SetPbeMode()" after this function you could add these lines to change to use the PLL clock:

   MCG->C1 = (MCG->C1 & ~MCG_C1_CLKS_MASK) | MCG_C1_CLKS(kMCG_ClkOutSrcOut);
   while (MCG_S_CLKST_VAL != kMCG_ClkOutStatPll)
   {

   }

The function I mentioned contains the necessary methods to configure the PLL and can be found at the SDK.

Let me know if this is helpful, if you have more questions do not hesitate to ask me.
Best regards,
Omar