We are deciding whether or not to use the KVx series in a new product. I think the LPTMR peripheral operation is common among all the Kinetis series with minor differences. I don't have a Kinetis board to test anything out right now.
We need to be able to keep the LPTMR running as a free running counter and also update the compare value on the fly. The datasheets seem to indicate that you cannot change the CMR value when the status TCF flag is CLEAR. I cannot find much information on what happens if you update the CMR when it's clear, but this thread: https://community.nxp.com/t5/Kinetis-Microcontrollers/Error-in-LPTMR-SDK/m-p/849272 seems to indicate that it works fine.
The compare value would be multiplexed between an overflow and user operation based on what occurs first in the future. This way we can keep a software count over what a 16 bit value can store. I think it is possible with some careful sequencing to read the state and then load the registers uninterrupted in under 1 timer clock cycle.
I have been familiar with Kinetis chips for almost a decade now, and it amazes me how NXP is still pushing out the LPTMR peripheral without both a compare AND an overflow interrupt. Is it really so hard to ask for a low power 16 bit timer with both compare and overflow interrupts in which the compare value can be loaded on the fly? It's got to be one of the simplest use cases for a timer that I can think of, and even MCU timers form decades ago gave you both compare and overflow interrupts as a baseline.
