Kinetis ML05Z Missing Interrupts

[orenkapah]

Setup: FDRM-KL05Z

CPU runs at 48MHz.

CodeWarrior Version: 10.3

Input: Digital signal on PTB6 pin.

Signal Frequency: 38KHz

I'm using ExtInt component to generate interrupt on both edges of

the digital input signal.

The problem: Every now and then, I miss interrupts.

Test program: In the ISR (Events.c) I just read the pin value

(using the GetVal method), and check if the current value of the

input is the same as the value received in the previous ISR. If we

do not miss interrupts, the value should be different, since the

signal must come down before it goes up again.

The result I get is that occasionally I get the same value twice.

[Robin_Shen]

Hi Oren,

Maybe the time between run into EInt1 interrupt twice is too short.

If you change the pulse width of your signal, still will that happen?

Hope that help.

Best Regards,

Robin

[orenkapah]

Thanks Robin for your answer, but unfortunately this is not the case.

As I said the CPU clock is 48MHz and the signal carrier frequency is 38KHz, so there shouldn't be any problem there.

Moreover, when I run my program in busy-wait method (reading the signal value over and over until the value is changed)

from the application level, it works correctly, doing a lot more then just checking the signal value.

Needless to say, that this is not a way to write the program in busy-wait method.

[Robin_Shen]

Hi Oren,

The MKL05Z32VFM4 on your FRDM-KL05 board does support Digital Glitch Filter function.You can see it at Table 3-47. Ports Summary in "KL05P48M48SF1RM".

So if your signal with noise , the ExInt will happen so frequently that the last ISR have not done even.

Alought I know when you use busy-wait method can get different state.The busy-wait method can get correct is because it runs very fast.

But your ExInt have long code in ISR, you can see PE_ISR(ExtIntLdd1_Interrupt) in ExtIntLdd1.c.

You can watch your signal using oscilloscope to confirm whether the signal is correct.

Best Regards,

Robin

[egoodii]

I must be misunderstanding something about Table 3-47, as what I see in Rev 3.1 of said manual is that the only pins with any available filtering is PFE on !RESET (PTA1) and NMI (PTB5).

[egoodii]

Firstly I would ask if you KNOW that you aren't getting 'double' interrupts on any one edge (edge rate, noise induced)?  You might turn on bit PFE for filtering on the pin (if available???).

Second concern is ALWAYS whether something else is 'holding off' interrupts on you for tens of microseconds.  You might change 'global' interrupt disables into priority-level disables:

PUBLIC uint32_t _IntsDisableCount; // count of performed disables

#define DISABLE_INT()    _IntsDisableCount++;\

                              __set_BASEPRI( 0x40L );        //All OTHER device interrupts on Level >=1, disable them

#define ENABLE_INT()      if(--_IntsDisableCount==0) \

                                    __set_BASEPRI( 0 );      //If we get back to 'base level', enable all interrupts

and put your 38KHz on a 'high' priority:

    set_irq_priority(INT_PORTB-16, 0);    //Highest priority, for timely handling

                //Also makes this  IRQ handler Uninterruptible.

For that to work, you also have to set "everybody else's priority" to two (or such).