KW36 adc input voltage range limitation due to Vref

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KW36 adc input voltage range limitation due to Vref

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nidhintomy
Contributor IV

I am using kw36. I configured PTB1 as single ended input for ADC(channel DAD1).

And useing 12 bit resolution and internal ref voltage.

When i am connecting a 3.3v source to adc input i am getting 4095 as output. So i am using a voltage divide circuit consist of 3, 100KΩ+/- 5% resistors. But now my readings are 350, 174, 160, ...

My questions

1. Then how can i accurately measure the voltage. How to scale down adc input volage in the range of Vref?

2. If KW36 is powered by 3v battery how can i measure battery voltage if the voltage drop in cell will affect Vref?

3. Which is better reference voltage source, Internal or External?

 

Best Regards,

Nidhin

 

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EduardoZamora
NXP TechSupport
NXP TechSupport

Hello,

Could you please confirm if you are using Buck Mode or Bypass Mode as Power Configuration? Details about your jumper configuration (specially J27, J30, J38) would be very helpful.

Please note that J38 may be shorting 2-3 on bottom layer, and if J27 and J30 are off, Buck Mode is selected. When Buck Mode is selected as Power Configuration, the reference should be 1.8V.

Regards,
Eduardo.

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nidhintomy
Contributor IV

Hi @EduardoZamora 

I am using frdmkw36_driver_examples_adc16_interrupt example. And using kADC16_ReferenceVoltageSourceValt as reference voltage.

Now once again reading MKW36 Reference Manual, Chapter 4.8.1 Analog Reference options , i have some doubts.

1. I am using Valt as reference. From the document i can understand that VDDA/VSSA are now reference voltage because of Valt. But looking on schematics VDDA is VDD(3.3v) and VSSA is ground. Is it means my reference voltage is 3.3V?

2. In KW36 data sheet, chapter 6.5.6.1.1 16-bit ADC operating conditionsScreenshot (32).jpg

So, i am using a 5, 1KΩ ± 5% resistors voltage divide circuit. When i am measuring the voltage across resistor from ground having 1V, the ADC gives 3564.  From the calculation it is 0.87V. But when i measured across 2V, 3V resistors i am getting 4095. If Valt is 3.3V then why i am getting 4095 on 2V and 3V resistors ?

3. Also i config all first single ended channels(ADC0_SE1, ADC0_SE2, ADC0_SE3, ADC0_SE4, ADC0_SE5) and measure adc output of this channels without connecting any input, i am getting 4095 on ADC0_SE1 and ADC0_SE2 ,  0 on ADC0_SE3 and ADC0_SE4 and 2593 on ADC0_SE5. Why i am getting these values without giving any input?

 

Best Regards,

Nidhin

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bobpaddock
Senior Contributor III

What the data sheet is saying is that the ADC input must be driven with a source impedance of less than 5k Ohms.  Otherwise you'll just get crap.

Generally you'd take your resistive divider into a OpAmp follower.  The output of the OpAmp follower would drive a 51 Ohm (typically) resistor into a 33 pF (typically) Capacitor (pick its value to be slightly higher than what the internal input capacitance is to swamp it out).  This also forms a low pass filter to keep the internal switching from getting out of the chip.

Analog Device in their Seminar Series goes into the details of ADC driving.
 

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nidhintomy
Contributor IV

Hi @bobpaddock 

How would i get crap if the source impedance is grater than 5k Ohms.

I understand the voltage follower op-amp. But didn't understand this:

The output of the OpAmp follower would drive a 51 Ohm (typically) resistor into a 33 pF (typically) Capacitor (pick its value to be slightly higher than what the internal input capacitance is to swamp it out). This also forms a low pass filter to keep the internal switching from getting out of the chip.

Did you say that there will be a huge difference between output of ADC with votage follower op-amp and output of ADC with only voltage divider circuits?

 

Best Regards,

Nidhin

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bobpaddock
Senior Contributor III

The ADC input is a complex impedance.

Some ADC's are implemented as a switched capacitance filter.

OpAmps are generally unstable driving a capacitors (the ones in the ADC) directly, hence the small series resistor.  The external capacitor gives a more stable value.  It also helps in EMI via preventing the ADC switching frequency from leaking out into the Real World to a degree.

See section six:

https://www.analog.com/en/education/education-library/linear-design-seminar-1995.html

 

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EduardoZamora
NXP TechSupport
NXP TechSupport

Hello,

Question 1
Reference voltage will depend on the voltage supply. If your device is connected to 3.3V and you are using VALT as reference option, reference voltage should be 3.3V.

Question 2
Could you please confirm your calculations, expected values and ADC results with a voltmeter? Please, do these measurements with voltage divider disconnected from the ADC input.
Just to confirm, are you using a separate power supply for your voltage divider or is it connected to a pin on the board?

Question 3
Floating or unconnected ADC inputs may result in an undefined reading due to several factors.

Regards,
Eduardo.

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nidhintomy
Contributor IV

Hi @EduardoZamora 

I did the measurements with help of multimeter.

1. Measure the voltage difference between P5V_USB and GND. It is in the range of 4.6-4.8. Never get 5V. Some times 4.6 and sometime 4.8.

2. Measured LDO output voltage through j35. It is 3V.

3. Connected P5V_USB and GND to voltage divider circuit.

4. Measured voltage at each node.

5. Configured PTB3 as adc conversion channel.

6. Connected PTB3 to circuit. Before PTB3 connected, voltage of that node is 1.8V. When PTB3 connected it drops to 1.5V

7.Measured ADC value at each node.

8. Calculate voltage at each node by ADC value ( Vnode = ADC value*3/4095 )

9. Compare the node voltage from step 4 and step 8. There is huge difference between values.(Eg. One node's voltage measured by multimeter is 1.5v, the measured voltage through calculation using ADC value is 2.62V). From this point i doubted Vref is less than 3V.

10. Also when measure adc value of another node having 1.85V, i got 4095. From here my observation is Vref is in between 1.5V and 1.85V.

Could you clarify this?

 

Best Regards,

Nidhin

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EduardoZamora
NXP TechSupport
NXP TechSupport

Hello,

Could you please confirm if you are using Buck Mode or Bypass Mode as Power Configuration? Details about your jumper configuration (specially J27, J30, J38) would be very helpful.

Please note that J38 may be shorting 2-3 on bottom layer, and if J27 and J30 are off, Buck Mode is selected. When Buck Mode is selected as Power Configuration, the reference should be 1.8V.

Regards,
Eduardo.

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nidhintomy
Contributor IV

Hi @EduardoZamora 

KW36 is configured in Buck mode (auto start).

J27: open         J30: open       J38: 2-3 shorted

Thanks for clarification.

 

Best Regards,

Nidhin

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nidhintomy
Contributor IV

Hi @EduardoZamora 

I am using P5V_USB from the board as 5V supply to voltage divider circuit.

I have a doubt.

My KW36 is connected to PC using USB. But from schematics i understanded that the LDO will generate an output of 3.3V from the P5V_USB and fed it to DCDC circuit. Then it connected to VDD. VDD and VDDA are shorted. I am using reference as Valt.

Is it sure that i will get a constant 3.3V reference?

Best Regards,

Nidhin

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EduardoZamora
NXP TechSupport
NXP TechSupport

Hi,

If you are powering the board via USB then the reference should be constant 3V.

Regards,
Eduardo.

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EduardoZamora
NXP TechSupport
NXP TechSupport

Hello,

Could you please help us with more details about your appllication? By any chance, are you using the ADC16 driver example from the SDK as base for your application?

Does "internal ref voltage" mean that you are using the VALT (Alternate reference pin pair) as Voltage Reference Selection? Please, remember that VALT reference is routed to VDDA/VSSA, as indicated in the MKW36 Reference Manual, Chapter 4.8.1 Analog Reference options.

EduardoZamora_0-1661548866404.png

Could you please clarify the issue with the ADC Result when using 3.3V as ADC input? Using this value as input, and if your reference voltage is equal to or less than 3.3V, the ADC Result should be the max value.

For a more accurate measurement, you can consult the Cookbook for SAR ADC Measurements.

Regarding to question 2, the ADC peripheral includes a Battery Monitor as a feature. Battery voltage option is the internal connection to the DCDC's scaled battery voltage output. It is not main battery voltage supply. More information on this can be found in Chapter 4.8.2.3: ADC0 Connections/Channel Assignment; and Chapter 16: DCDC Converter (DCDC).

Regarding to question 3, it will depend on your application and available resources. Please, verify if your chipset supports external voltage reference and if these pins are available on the package.

Regards,
Eduardo.

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