KM Family's NMI pin

[jun1]

I am always indebted.

I use the KM Family's MKM14Z64A.

I have a question about the NMI pin.

I'm switching after reset to use the NMI pin for GPIO.
Also, because we want to disable NMI, we are programming the Flash Option Register NMI_EN = 0.

If the CPU is mounted on a board with this pin pulled down due to hardware reasons and the flash loader is transferred to RAM and executed, it will fail.

After executing all erase commands from the initial state CPU or CMSIS-DAP, it will jump to the NMI vector and runaway.

Moreover, at this time, since the secure bit is also on the secure side immediately after the entire erase, even access is not possible.

Is there any way to write successfully with the NMI pin pulled down?

In my opinion, NMI_EN of Flash Option Register is 0 if NMI is enabled and 1 is prohibited.

Thank you for your instruction.

jun

[jingpan · Accepted solution]

Hi jun,

This is the way of how NMI_b working. When NMI_EN=1, NMI_b pin is enabled. When it is 0, NMI_b pin is disabled. Whatever mode you set, NMI_b should connect a pull-up resistor. If you pull down it, you'll meet many trouble.

Regards,

Jing