KE18F512VLH16 ECC Memory Cell Autocorrection

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KE18F512VLH16 ECC Memory Cell Autocorrection

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sean_dvorscak
Contributor III

It's understood that the HW provides automatic correction of single bit ECC errors. However, it's unclear where the corrections are being made.

When the hardware autocorrects a single bit ECC error, does it correct on both the read out and the memory cell, or just on the read out?

From the AN5335 example figure, is the Read-out Data being corrected from 0->1? That would mean we need to write back the corrected value to RAM to actually clear it within the memory cell.

sean_dvorscak_0-1786035276314.png

 

 

We are concerned if the data in the RAM memory cell is not corrected, a single bit error could degrade to a double bit error.

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Alice_Yang
NXP TechSupport
NXP TechSupport

Hello @sean_dvorscak 

1. "When the hardware autocorrects a single bit ECC error, does it correct on both the read out and the memory cell, or just on the read out?"

->>The correction is performed only on readout; the SRAM cell contents are not written back.

2. "We are concerned if the data in the RAM memory cell is not corrected, a single bit error could degrade to a double bit error."

->>Yes, if you want to clear errors in the memory cells and prevent error accumulation, it is recommended that the software perform a read-correct-writeback operation.

 

Thank you.

 

BR

Alice

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