K70 SPI with CPOL1

[Ali2006]

I'm utilizing the K70 processor with MQX 4.1 and SPI2.   I would like the system to operate with the clock idling HIGH, but it doesn't appear to stay high.    The SPI2_CTAR0 is properly set to 0x3ecd707a to select my baud rate and SPI mode 3 accordingly.. but the SCLK line only stays high while the SS line is active.. When it's released the SCLK returns low.   An then 23ns before the SS line goes LOW the clock is initialized high again.   I realize that you could use the SPI2 line for multiple systems and that possibly the clock polarity would change between each SPI transaction, but I would like the Clock line to stay high inbetween SPI transactions.. Is there anyway to accomplish that? 

[Pavel_Hernandez]

Hello,

I think you are misunderstanding the CPOL, the inactive state [IDLE] value of SCK low is 0, in this configuration when you send a frame the SCL must be going high, is this what you need it? if yes try this configuration if you need more information please let me know.

Best regards,
Pavel