K64 ADC specification

[manfredschnell]

Hi

we use K64 in our design with the internal ADC single ended 16bit...

In the datasheet "K64P144M120SF5" (Rev. 7, 11/2016)

Topic: 3.6.1.2 16-bit ADC electrical characteristics

There are still only values for 12-bit modes specified.

How can I get valid values for 16-bit AD-Conversion variations?

--> can NXP provide this values? (TUE / DNL / INL / EFS)-Values for 16-bit

--> do I have to multiply the 12-bit (TUE / DNL / INL / EFS)-Values by 16  (to convert them from 12 to 16 bit??)

I've to calculate the maximum error in our circuit. External errors are known... but the internal ADC --->> ???

Any hint would be appreciated!

Best regards

Manfred

[miduo]

Hi,

Please be note that Kinetis SAR only defines static performance up to 12-bit accuracy.  Ramp testing is prohibitively difficult beyond 12-bit accuracy, and although we have a capable test setup and alternative methods we could use for 16-bit linearity, the test times are so long that a full characterization of the ADC across all operating conditions and configurations is an impossible resource sink for our limited validation resources.   That's why the K64 datasheet only provide ADC module with 12-bit mode data about TUE, DNL, INL and etc. parameters.

The ADC 16-bit mode should yield 12-bit accuracies performance or better. Note that although the sensitivity of the actual voltage will be 12-bit accuracy , the relative LSB will be larger because the code is in 16-bit resolution not 12-bit resolution.

[manfredschnell]

Hi Fang Li,

can you please answer?

It would be nice to ge a Statement about your 16-bit ADC Performance tests.

Best regards

Manfred

[manfredschnell]

Hi Fang Li,

thank you for your answer.

Did you never run a 16-bit ADC performance test for K64?

If you did... would you share the results?

Otherwise I have to assume the 12-bit erros for 16-bit. (that means multiplying the brrors by 16).

--> so you should'nt write about "Two 16-bit SAR ADCs" in your datasheet.

Regards

Manfred