Hi Anders
Each ADC can sample one of the multiplexed inputs at a time so if there are 2 ADCs in the device two inputs can be sampled in parallel.
If you use HW mode (eg. triggered by PDB) each ADC can then sample two inputs (serially - one after the other - and not in parallel).
This means that if you have 16 inputs and you will need to sample 2 or 4 inputs at a time and then adjust the input multiplexer, repeat for the next 2..4, then the next 2..4 etc. until you get back to the beginning again.
If you search the forum there are a number of discussions about doing this as well as some techniques for automating the input multiplexing based on DMA so that the complete cycle repeats without SW intervention (or reduced SW requirements).
Application note on DMA driven ADC and DAC, using PDB as timebase
https://community.freescale.com/message/365129#365129
https://community.freescale.com/message/112710#112710
Regards
Mark
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