1. K60 eDMA
- 16-channel implementation
- Local memory containing transfer control descriptors for each of the 16 channels
- 32-byte TCD stored in local memory for each channel
2. DMA memory to memory performance
- In the traditional M2M data movement, performance is best expressed as the peak data transfer rates
- In most implementations, this transfer rate is limited by the speed of the source and destination address spaces.
3. eDMA peak transfer rate
4. Performance test
With K60 100MHz (TWR-K60D100M), implement internal SRAM-SRAM eDMA data transfer. If transfer size setting as 32-bit in TCD Transfer Attributes (DMA_TCD_ATTR), there will has one wait state during each read/write. That's why the DMA performance doesn't up to 200MB/s as the manual stated.
We highly recommend setting DMA transfer size to 16-byte at DMA_TCD_ATTR register, it will much increase the DMA performance.(Get 162MB/s transfer rate with TWR-K60D100M board.)
- 5. Testing code attached.
