Hi,
Apologies if I've missed something, but I've been looking for quite some time now and cant find any hardware design guide for the K60 chips (more specifically the K60P144M100SF2 but that's not hugely relevant).
To clarify, what I'm expecting is a document that gives some guidance on things like decoupling capacitors for power supplies, pull-up/down resistors suggested for JTAG connections, placement and routing tips etc.
While documents like the quick start guide linked below make some vague references to some of the above (for example, it states the need to the need to place decoupling capacitors close to the device), it's only a general document aimed at all kinetis chips and states no actual values to use. The document I want gives me actual values for capacitors to use for VREF, VDD and VDDA, and potentially includes a small reference shematic/other useful information on things such as crystals/clocks required/suggested for the processor and its ethernet connections.
Does such a document exist that I've simply not found?
Many thanks
http://www.nxp.com/assets/documents/data/en/quick-start-guide/KQRUG.pdf
Hi Charlie Heard,
Except the Kinetis Peripheral Module quick reference.pdf.
You also can refer to the TWR-K60D100 schematic :
http://www.nxp.com/assets/downloads/data/en/schematics/TWR-K60D100M_SCH.pdf
In our community, there also have a hardware design tip for your reference:
Kinetis Hardware Design Tip & Tricks | NXP Community
Wish it helps you!
Have a great day,
Kerry
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