I am running Signal integrity simulation using K26 IBIS model and SDram device, but i am able to see overshoot at K26 for read condition So anybody tell me What is maximum overshoot acceptance for K26 device ?
Do you mean the voltage overshoot acceptance on the MCU input pins?
This is VDD+0.3V / VSS-0.3V
So if the VDD = 3.3V
Then the input signals should be in range -0.3V to 3.6V
