K22FN256LH12 and SPI Serial Flash

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K22FN256LH12 and SPI Serial Flash

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burgeh
Contributor IV

Background:

I am currently using KDS v3.2 and Processor Expert to work on my custom K22FN256LH12 chip. I am also using this SPI serial flash memory W25Q128JV chip that I would like to store data too.

Question:

Is there a processor expert component that I should be using or file system? I believe SPIFFS would work, but I am unsure how to port this onto the board. The FATFS component seems to only be for SD, SDHC, or USB. There are spi components, but they do not really say which pins it is using.

Thanks!

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mjbcswitzerland
Specialist V

Christopher

Once you have sent the command and 24 bit address you need to send further data (eg. 0x00 or 0xff) in order to generate the clock to read data in. The CS line must remain low during the data read.

You will also need to read the data that was returned during the command and 24 bit address and discard it in order to make place for the data input that follows.

If you are sending extra data to clock in the data bytes but this is not making it to the SPI bus it probably means that you are not waiting for the FIFO to have enough space to accept them and overflowing the output (which will then lose the data). Depending on which physical SPI is being used your will have ether a 4 deep or 1 deep FIFO so the behavior could also be different on different SPIs if the wait is not implemented correctly.

Regards

Mark

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burgeh
Contributor IV

So I found this Processor Expert has a component named "SPIMaster_LDD" which has some basic methods to communicate via SPI. I am able to send data fine, but I am not able to receive. This is due to the driver not sending a clock signal to clock in the incoming data. Attached is an image of the trace. I send 0x03h and a 24-bit address ( as protocol for the winbond W25Q128JV). But as like all other SPI I need to be able to clock in the data. Is there a method I'm missing otherwise how else could I generate this clock on the standard SPI pins? The other image displays how the flash device is connected to the MK22fn256VLH12. I've ensured the voltages are correct and the device is setup correctly.  I tried to add another 0x00h to make a "fake" clock. Still nothing.

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jingpan
NXP TechSupport
NXP TechSupport

Hi Christopher,

PE does not give file system component. And currently we do not support Ardunio SPIFFs. I think you may have to add a abstract level to map the SPIFFs requirement to SPI driver.

There is a SDSPI_Fatfs demo in SDK. This is because SD card can support SPI port. Controller use SD command to control SD. So it can't be used on W25Q128JV.

Regards

Jing

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burgeh
Contributor IV

So, in your opinion what would be the best option to try and control/use serial flash?

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mjbcswitzerland
Specialist V

Hi Christopher

There is a Winbind SPI Flash driver in the uTasker project [spi_flash_w25q.h] which works with all Kinetis parts as parameter system, file system or FAT file system (or USB-MSD), as well as a low level flash API that is compatible for internal and SPI flash (for custom usage).

If you download the open source version from GIT hub you can also simulate the operation and either use it as complete working solution or copy the bits needed to fill out the gaps in the environment you need to use.

Regards

Mark

P.S.
The following video tutorial explains the basics of the memory interface which is also compatible with SPI use (even if not specified specifically in that clip):
https://www.youtube.com/watch?v=Pe9A8qsefzQ&index=12&list=PLWKlVb_MqDQFZAulrUywU30v869JBYi9Q

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burgeh
Contributor IV

Thanks Mark, that header file may be very useful, but I do not see a place where I can which pins my SPI is connected too. Also, could you explain this a little more, on how I would be able to use this as a file system?

Mark Butcher wrote:

Hi Christopher

 

There is a Winbind SPI Flash driver in the uTasker project [spi_flash_w25q.h] which works with all Kinetis parts as parameter system, file system or FAT file system (or USB-MSD), as well as a low level flash API that is compatible for internal and SPI flash (for custom usage).

Thanks!

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mjbcswitzerland
Specialist V

Hi Christopher

Before the W25q chip is checked, its interface to it is configured (in kinetis.c
    // Power up the SPI interface, configure the pins used and select the mode and speed
    //
    POWER_UP_SPI_FLASH_INTERFACE();
    CONFIGURE_SPI_FLASH_INTERFACE();                                     // configure SPI interface for maximum possible speed (after TICK has been configured due to potential use of delay routine)

The hardware definitions are in the file app_hw_kinetis.h. For example, the FRDM-K22F board used the following as default:

    #define SPI_FLASH_FIFO_DEPTH            SPI0_FIFO_DEPTH
    #define CS0_LINE                        SPI_PUSHR_PCS0               // CS0 line used when SPI FLASH is enabled
    #define CS1_LINE                                                     // CS1 line used when extended SPI FLASH is enabled
    #define CS2_LINE                                                     // CS2 line used when extended SPI FLASH is enabled
    #define CS3_LINE                                                     // CS3 line used when extended SPI FLASH is enabled

    #define SPI_CS0_PORT                    ~(SPI0_PUSHR)                // for simulator
    #define SPI_TX_BYTE                     SPI0_PUSHR                   // for simulator
    #define SPI_RX_BYTE                     SPI0_POPR                    // for simulator

    #define CONFIGURE_SPI_FLASH_INTERFACE() _CONFIG_PERIPHERAL(D, 0, (PD_0_SPI0_PCS0 | PORT_SRE_FAST | PORT_DSE_HIGH));\
                                            _CONFIG_PERIPHERAL(D, 1, (PD_1_SPI0_SCK | PORT_SRE_FAST | PORT_DSE_HIGH));\
                                            _CONFIG_PERIPHERAL(D, 2, (PD_2_SPI0_SOUT | PORT_SRE_FAST | PORT_DSE_HIGH));\
                                            _CONFIG_PERIPHERAL(D, 3, (PD_3_SPI0_SIN));\
                                            SPI0_MCR = (SPI_MCR_MSTR | SPI_MCR_DCONF_SPI | SPI_MCR_CLR_RXF | SPI_MCR_CLR_TXF | SPI_MCR_PCSIS_CS0 | SPI_MCR_PCSIS_CS1 | SPI_MCR_PCSIS_CS2 | SPI_MCR_PCSIS_CS3 | SPI_MCR_PCSIS_CS4 | SPI_MCR_PCSIS_CS5);\
                                            SPI0_CTAR0 = (SPI_CTAR_DBR | SPI_CTAR_FMSZ_8 | SPI_CTAR_PDT_7 | SPI_CTAR_BR_2 | SPI_CTAR_CPHA | SPI_CTAR_CPOL); // for 50MHz bus, 25MHz speed and 140ns min de-select time

    #define POWER_DOWN_SPI_FLASH_INTERFACE() POWER_DOWN_ATOMIC(6, SPI0)  // power down SPI interface if no SPI Flash detected

    #define FLUSH_SPI_FIFO_AND_FLAGS()      SPI0_MCR |= SPI_MCR_CLR_RXF; SPI0_SR = (SPI_SR_EOQF | SPI_SR_TFUF | SPI_SR_TFFF | SPI_SR_RFOF | SPI_SR_RFDF);

    #define WRITE_SPI_CMD0(byte)            SPI0_PUSHR = (byte | SPI_PUSHR_CONT | ulChipSelectLine | SPI_PUSHR_CTAS_CTAR0) // write a single byte to the output FIFO - assert CS line
    #define WRITE_SPI_CMD0_LAST(byte)       SPI0_PUSHR = (byte | SPI_PUSHR_EOQ  | ulChipSelectLine | SPI_PUSHR_CTAS_CTAR0) // write final byte to output FIFO - this will negate the CS line when complete
    #define READ_SPI_FLASH_DATA()           (unsigned char)SPI0_POPR
    #define WAIT_SPI_RECEPTION_END()        while ((SPI0_SR & SPI_SR_RFDF) == 0) {}
    #define CLEAR_RECEPTION_FLAG()          SPI0_SR |= SPI_SR_RFDF
    #define SET_SPI_FLASH_MODE()                                         // this can be used to change SPI settings on-the-fly when the SPI is shared with SPI Flash and other devices
    #define REMOVE_SPI_FLASH_MODE()                                      // this can be used to change SPI settings on-the-fly when the SPI is shared with SPI Flash and other devices

The pins and SPI used can be changed here to suit the HW in the project.

This is the low level driver which allows flash operations, used by various parameter and file systems in the uTasker project where the user automatically has these capabilities to choose from. Since you don't use the uTasker project you will have to see whether the middle ware in your environment can support such things and/or allows such hooks to be added. If not you will either need to develop the file system on top of it or accept that what the environment allows.

Regards

Mark

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