K20 VREF_OUT Never Stabilizes

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K20 VREF_OUT Never Stabilizes

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tsxer
Contributor II

I have a custom board with an MK20DX256VLK10.  We are trying to use a single-ended line on ADC0 to measure a voltage with respect to the VREF_OUT pin.  We want to use the mode where VREF_OUT is a 1.2V output from the K20.

My issue is that the VREF_SCVREFST_MASK bit never goes HIGH in the VREF_SC register.

I use the following MQX code to try to initialize the VREF module.  I've confirmed the VREFST bit is LOW from the CodeWarrior debugger.  The VREF_OUT pin on the K20 has a 100 nF capacity between it and GND as required by the Reference Manual.  I've tried cranking out the delay loop to 500 ms, but I still get the same result.

Please help.  Am I doing something incorrect here?

Regards,

Ben

boolean EnableVRefAlt (void)

{

   int32_t         iReturn;

   boolean        returnValue;                                 // Return value from this function.

   const int32_t  VOLTAGE_STABLE_MS = 10;    // Milliseconds to wait for the VREF_OUT voltage to

                                                                         //    stabilize.

   // Make sure the clock is turned on to the K20 VREF module.

   SIM_SCGC4 |= SIM_SCGC4_VREF_MASK;

   VREF_SC = VREF_SC_VREFEN_MASK;

   returnValue = FALSE;

   // Wait for the voltage to stabilize.

   for (iReturn = 0; iReturn < VOLTAGE_STABLE_MS; ++iReturn)

   {

      if (VREF_SC_VREFST_MASK == (VREF_SC & VREF_SC_VREFST_MASK))

      {

         returnValue = TRUE;

         break;

      }

      else

         _time_delay(1);

   }

   if (! returnValue)

      printf("After %d ms, VREF voltage is not stable, VREF_SC = 0x%X.\n", iReturn, VREF_SC);

   return returnValue;

}

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tsxer
Contributor II

It turns out to have been a hardware issue that caused the problem.  An incorrect part was identified in the BOM for supporting circuitry.

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tsxer
Contributor II

It turns out to have been a hardware issue that caused the problem.  An incorrect part was identified in the BOM for supporting circuitry.

View solution in original post

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chris_brown
NXP Employee
NXP Employee

Hi Ben,

I have tried this on a K60 (which has the same VREF module) and haven't seen an issue.  Is this function being called from a low power mode?  Could some other task be interrupting this one?  Are you sure you're waiting 500ms (because that should definitely be enough time)?

Best of luck,

~Chris

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tsxer
Contributor II

Hi Chris,

The code is definitely not in low power mode.  The application stays in run mode throughout its life.

When the application calls my EnableVRefAlt() function, I have not yet set up interrupts for the peripheral devices on the board.  But even if interrupts were happening, the application completes the loop and prints that the value in the VREF_SC register is 0x80 -- the VREF_SC_VREFEN_MASK bit is ON, but the VREF_SC_VREFST_MASK bit is OFF.

When I vary the VOLTAGE_STABLE_MS value between 10 ms and 500 ms, I can see a change in the delay when the printf() message appears on the debug port, so I'm sure the function is waiting long enough.

The code does only two things to the VREF module before checking the VREFST bit:

- Turn on the VREF clock via the SIM_SCGC4 register, and

- Turn on the VREFEN bit in the VREF_SC register.

Given that the MCU is in RUN mode, is there anything else required?  Is there any other module on the K20 that would interfere with the VREFST bit becoming HIGH?

Regards,

Ben

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chris_brown
NXP Employee
NXP Employee

Hi Ben,

It sounds like you are doing everything correctly.  It makes no sense why this would be happening.  Does this happen for every chip you have tried (or have you been able to try different chips)?

Best Regards,

Chris

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tsxer
Contributor II

Hi Chris,

I've tried this on four of our prototype platforms.  They all behave the same way.

Just to try something new, I shut off the VREF module before running the code above, but problem still persists.  The RM says turning off the clock to the VREF module is not sufficient to shut off the VREF module -- you also have to disable the VREFEN bit.  Here is the code I ran before calling the EnableVRefAlt() routine:

   // Kill any previous VREF set up, then wait a little bit.

   VREF_SC &= ~(VREF_SC_VREFEN_MASK);

   SIM_SCGC4 &= ~(SIM_SCGC4_VREF_MASK);

   _time_delay(10);

   // Now try to initialize the VREF module.

   EnableVRefAlt();

Regards,

Ben

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chris_brown
NXP Employee
NXP Employee

Hi Ben,

So, you say you aren't using a low power mode, but are you using VLPR?  If not, could you try enabling the bandgap in the PMC module anyways and see if that makes a difference?

~Chris

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