Is there a mode in which a Kinetis MKM34Z256 drives RESET Pin active after Power up (POR)?

manfredeggersdo · ‎08-29-2017

Hello,

I have got a problem in the 3rd revision of scematic/layot which I do not understand.

When I take the new unprogrammed PCB's and power up (POR) - then I can't program it.

So I looked at the RESET-Pin - and this got a voltage of 390mV.

The RESET Pin is normally Pulled up with a 470R Resistor.

If I connect the RESET Pin direct to 3.3V - a current of approx 30mA is measurable - so it looks llike the Reset drives as an Output.

I tried with different PCBs - same behaviour.

So does anybody has a idea what could be?

Best Regards

Manfred

****************

Some measurements later...

The RESET Pin of the uC is driven low by the Kinetis itself for some microseconds - then released - then driven low again - and so on...

It looks like a Pulse Width Modulation with a frequenc of approx 3 kHz.

What could be a reason for this behavior?

Best Regards Manfred

manfredeggersdo · ‎08-31-2017

Hello,

thank you for reply.

The PCB's and so also the µC's are brand new.

Why it works in earlier version with the same schematic?

And also it works on a different PCB with µCs of the same charge and with the same schematic - producet one week earlier.

I am able to debug the µC via Kinetis design studio - and then the new program is stored in the µC - but the Reset pin is still oscillating and I can't write the µC in normal way.

Best Regards

Manfred

Hui_Ma · ‎09-04-2017

Hi Manfred,

Could you provide the KM34 SWD debug interface circuit for double check?

From my understanding, the KM34 SWD circuit/layout is not reliable, which could affect the MKM34 Flash programming during debug phase.

best regards,

Mike

manfredeggersdo · ‎09-05-2017

Hello,

yes I can do that:

JP8 is the SWD debug connector - standard 2,54mm.

All Pictures showes the same layout - I have highighted the different nets:

From top down:

* schematic µC and Debug Port part

* both layer VCC highlighted

* bottom layer GND highlighted

* top layer GND highlighted

* both layer SWD DIO highlighted

* both layer SWD CLK highlighted

I found out in the meanwhile, that the debug - using Kinetis Design Studio and the PEMicro-Interface (Using the debut port of TWR-KM34Z75M with short cable) works - but not the programming using this interface via mass storage - and I don't have any explanation for this behavior.

With best Regards

Manfred

* both layer reset highlighted

Hui_Ma · ‎09-05-2017

Hi Manfred,

From your attached schematics, I would recommend R12 to use 4.7Kohm pull up resistor, the 470ohm pull-up resistor is too strong.

For you are using TWR-KM34Z75M board as a PEMicro debugger tool, please remove the 0 ohm resistors (R133, R134, R135 & R136) to cut the connection with TWR-KM34Z75M board's KM34 chip.
Could you try with the Segger J-Link firmware for TWR-KM34Z75M OpenSDA?

The Segger J-Link openSDA version is V1.0 at TWR-KM34Z75M.

You could download the Segger J-Link openSDA v1.0 image from below link:
https://www.segger.com/downloads/jlink/OpenSDA_V1

Please let us know the test result.

Have a great day,
Ma Hui

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manfredeggersdo · ‎09-06-2017

Hello,

R133, R134, R135 and R136 is disomounted.

I changed R12 to 4k7 - but it is still the same behavior.

And btw.: in Laststat.txt is following Error stored after I tried to program via mass storage mode:

Error. Validation of programming scenario failed.

Do you mean, that I can update the PE-Micro firmware of the Tower Module to Segger Jlink-Firmware?

How?

In my opinion it is a PE Micro.

Best Regards

Manfred

Here is a screenshot of the data waveforms - measured at JP8

Blue: swd_CLK

Yellow: SWD_DIO

stored while Kinetis design Studio runs in debug mode (and program runs)

Hui_Ma · ‎09-06-2017

Yes, you could update the TWR-KM34Z75M on board OpenSDA firmware to Segger J-Link.

Please check below useful video/thread/document about how to update the OpenSDA firmware:

Updating the OpenSDA Firmware - YouTube

Update OpenSDA on my FRDMK64F?

OpenSDA Update Instructions for Freescale Freed... | element14 | Freedom development platform

Below are the Major steps:
1. Hold down the reset button on your TOWER board
2. While holding the button down, plug the USB cable into OpenSDA USB socket, and then release the reset button
The board will enumerate as BOOTLOADER
3. Drag and drop the Segger J-Link for OpenSDA v1 image file into the BOOTLOADER drive
4. After it finishes copying, unplug the TOWER board, and then replug it back in. This is the point where the bootloader firmware is updated.

Wish it helps.

Have a great day,
Ma Hui

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manfredeggersdo · ‎09-07-2017

Hello,

for the reason, that the Segger OpenSDA does not provides a mass storage device (MSD) - took the newer Image of segger for the TWR-KM34Z75M:

SEGGER - The Embedded Experts - Downloads

Now it looks very good!

Many, many thanks to you!

Manfred

PS:

Which Probe/Tool would you suggest for production?

I need a very simple tool like MSD.

Hui_Ma · ‎09-07-2017

Hi,

About the stand-alone programmer, I had used the P&E Cyclone Max.
I check P&E new launched the CYCLONE and CYCLONE FX with similar feature.

I also check Segger provided [Flasher ARM] & [Flasher Portable PLUS] tools.
To be honest, I don't have experience to use Segger stand-alone programmer tool.
Please check with Segger if you have any further questions about those tools.

Have a great day,
Ma Hui

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MarMi · ‎09-01-2017

Hi Manfred,

the reason for oscillating reset pin @ 3kHz frequency might be so called WCT window of WDOG - it is a 256 bus clock cycles window after POR when WDOG registers must be unlocked by SW failing which the WDOG issues a reset to the system. This would result theoretically in toggling frequency of resert pin ~ 3.9 kHz {1/256e-3}.

Kind regards,

Martin M.

Hui_Ma · ‎08-31-2017

Hi

Please check below thread about un-programmed MKM34Z256 reset pin signal:

https://community.nxp.com/message/463378?commentID=463378#comment-463378

Wish it helps.

Have a great day,
Ma Hui

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