Init clock K20D72M

[pietrodicastri]

Good morning

I need to init the clock for 72 MHz on the K20D72M board

The xtal is 8000000 Hz

I see on the scope it is oscillating

I use the following data structure

const mcg_config_t mcgConfig_BOARD_BootClockRUN =
{
.mcgMode = kMCG_ModePEE, /* PEE - PLL Engaged External */
.irclkEnableMode = kMCG_IrclkEnable, /* MCGIRCLK enabled, MCGIRCLK disabled in STOP mode */
.ircs = kMCG_IrcSlow, /* Slow internal reference clock selected */
.fcrdiv = 0x0U, /* Fast IRC divider: divided by 1 */
.frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
.drs = kMCG_DrsLow, /* Low frequency range */
.dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
.oscsel = kMCG_OscselOsc, /* Selects System Oscillator (OSCCLK) */
.pll0Config =
{
.enableMode = MCG_PLL_ENABLE, /* MCGPLLCLK enabled */
.prdiv = 0x02U, /* PLL Reference divider: divided by 3 */
.vdiv = 03U, /* VCO divider: multiplied by 27 */
},
};
const sim_clock_config_t simConfig_BOARD_BootClockRUN =
{
.pllFllSel = SIM_PLLFLLSEL_MCGPLLCLK_CLK, /* PLLFLL select: MCGPLLCLK clock */
.er32kSrc = SIM_OSC32KSEL_RTC32KCLK_CLK, /* OSC32KSEL select: RTC32KCLK clock (32.768kHz) */
.clkdiv1 = 0x01130000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV2: /2, OUTDIV3: /2, OUTDIV4: /4 */
};
const osc_config_t oscConfig_BOARD_BootClockRUN =
{
.freq = 8000000U, /* Oscillator frequency: 50000000Hz */
.capLoad = (OSC_CR_SC8P_MASK), /* Oscillator capacity load: 0pF */
.workMode = kOSC_ModeOscHighGain, /* Use external clock */
.oscerConfig =
{
.enableMode = kOSC_ErClkEnable, /* Enable external reference clock, disable external reference clock in STOP mode */
}
};

No way. It stops here

while ((MCG->S & (MCG_S_IREFST_MASK | MCG_S_CLKST_MASK)) !=
(MCG_S_IREFST(kMCG_FllSrcExternal) | MCG_S_CLKST(kMCG_ClkOutStatExt)))
{
}

Suggestions needed.

Thank You

Pietro

[nxf56274]

Hi,

Why not try the attachment I have given you? We do not have this board's latest sdk. Only the old code.

Have a great day,
TIC

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[pietrodicastri]

Hi Da Li

I have a hard time to find a solution. The problem with the example is that even if it works I do not see a direct way of detecting the problem in  using the SDK.

I have now found a working solution, The parameters in the SDK structure produce the right clock, but in the example the clock source for the debugging uart was the BUS clock in place of the CORE clock so it was not appearing to work. 

Now it is running correctly with the modification in the SDK function.

So far I have a solution.

Thank You for supporting,

Pietro

[pietrodicastri]

Good morning

I need to initialize the kit with the SDK. The question is very limited I can well suppose a bunch of people have already done. 

This board has a xtal to run with and the SDK does not provide the procedure to initialize. 

Such situation needs a support.

Thank You

Pietro

[nxf56274]

Hi,

k20's code is old. I will give you the attachment. This code only support IAR and codewarrior. And the IAR version is 7.8.  The higher version may cause some problems. 

Have a great day,
TIC

-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!

- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
-------------------------------------------------------------------------------

[pietrodicastri]

Hi

unfortunately despite the good values on the dumping clocks it is not working fine. 

The debug console is not outputting correct data. So I don t know.

Still the question is open.

Suggestions needed.

Pietro

[pietrodicastri]

Hi Da Li

Thank You for the suggestion. Effectively the structure of the code is totally different and difficult to analyze for exporting the logic. I tried anyway. 

I found a solution just try and test. If I modify the function of the SDK 

void CLOCK_InitOsc0(osc_config_t const *config)
{
uint8_t range = CLOCK_GetOscRangeFromFreq(config->freq);

OSC_SetCapLoad(OSC0, config->capLoad);
oscer_config_t oscer_config;
oscer_config.enableMode = config->oscerConfig.enableMode & !kOSC_ErClkEnable;

OSC_SetExtRefClkConfig(OSC0, &oscer_config );

MCG->C2 = ((MCG->C2 & ~OSC_MODE_MASK) | MCG_C2_RANGE(range) | (uint8_t)config->workMode);

if ((kOSC_ModeExt != config->workMode) && (OSC0->CR & OSC_CR_ERCLKEN_MASK))
{
/* Wait for stable. */
while (!(MCG->S & MCG_S_OSCINIT0_MASK))
{
}
}
OSC_SetExtRefClkConfig(OSC0, &config->oscerConfig );
}

in such way the initialization proceed correctly.  It seems it does not tolerate to have the ERCLKEN set in the OSC_CR.

There is no explanation to me. I clear the flag and I set again before exiting. I have a function to verify the results:

void clocks_dump( void )
{
clocks.core_frequency = CLOCK_GetFreq( kCLOCK_CoreSysClk );
clocks.bus_frequency = CLOCK_GetFreq( kCLOCK_BusClk );
clocks.flash_frequency = CLOCK_GetFreq( kCLOCK_FlashClk );
clocks.osc0Er_frequency = CLOCK_GetFreq( kCLOCK_Osc0ErClk );
clocks.osc0ErUndiv_frequency = CLOCK_GetFreq( kCLOCK_Osc0ErClkUndiv );
clocks.mcgFll_frequency = CLOCK_GetFreq( kCLOCK_McgFllClk );
clocks.mcgFf_frequency = CLOCK_GetFreq( kCLOCK_McgFixedFreqClk );
clocks.mcgIr_frequency = CLOCK_GetFreq( kCLOCK_McgInternalRefClk );
clocks.lpo_frequency = CLOCK_GetFreq( kCLOCK_LpoClk );
clocks.mcgOut_frequency = CLOCK_GetOutClkFreq();
clocks.osc32_frequency = CLOCK_GetFreq( kCLOCK_Er32kClk );
}

I get these results

Since I do not find the logic in it You and everyone is welcome to express.

Thank You

Pietro