/******************************************************************************
* File:    hw_trig_test.h
* Purpose: header file for hw_trig_test.c
* Note: 
******************************************************************************/

#ifndef __HW_TRIG_TEST_H
#define __HW_TRIG_TEST_H 1


#define POT           19
#define ADC1_CHANA    POT                                  // set to desired ADC0 channel trigger A    
#define ADC1_CHANB    POT                                  // set to desired ADC0 channel trigger B    


#define ADC1_DLYA     0x4000                                // ADC0 trigger A delay 
#define ADC1_DLYB     0x8000                                // ADC0 trigger B delay 


#define ADC1A_DONE   0x01       
#define ADC1B_DONE   0x02       

/* Addresses for VECTOR_TABLE and VECTOR_RAM come from the linker file */  
extern uint32 __VECTOR_RAM[];

/* function prototypes */

extern uint8_t hw_adc_test(void);

extern void adc1_isr(void);  //  files have local isrs for ADC 
extern void pdb_isr(void);

#endif  //__HW_TRIG_TEST_H

/* End of "hw_trig_test.h" */
