How to manually enable CAN RxFifo on KDS2.0 Pexpert?

[yarannan]

Hi,

1. My project is using MK20DC256VLL10 and we found out it drops around 1.5% CAN frames.

2. The project is using KDS 2.0 and processor expert.

3. The project only has one CAN node ID enable.

4. Reference manual mentions that can enable MCR[RFEN] to enable RxFifo. (I am assuming

that is the reason of losing CAN frames).

5. Unfortunately, processor expert doesnt support to enable the feature of enabling RxFifo

6. I saw other people has the same problem in the forum. They suggested to enable manually.

7. I dont quite know how to enable them without effecting codes already generated.

8. Currently, CAN is read when the interrupt flag set up.

Does anyone have any suggestion about how to manually enable RxFifo or reduce losing CAN

messages?

Thanks,

Yaran

[isaacavila]

Hi Yaran,

Also, K20_100MHz is supported in KSDK 1.2.0 software, you can download it from (Software Development Kit for Kinetis MCUs|Freescale )

Inside this SDK, you will find a FlexCAN example (for TWR-K60D100M, but it will be the same that for K20) and can support Rx FIFO functionality.

You may check this example.

Regards,

Isaac

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[yarannan]

Hi Issac,

When I tried to create a KDS project on KDS3.0 and it wouldnt allow me

to select KSDK1.2.0 under the selection of processor MK20DX256VLL10.

Does it support MK20 for sure or I configured something wrong?

Thanks,

[isaacavila]

Hi Yaran,

Have you installed 'KSDK_1.2.0_Eclipse_Update'?

You can find the update file in 'C:\Freescale\KSDK_1.2.0\tools\eclipse_update' and instructions to install the file are described in 'C:\Freescale\KSDK_1.2.0\doc\Getting Started with Kinetis SDK (KSDK) v.1.2.pdf'

I have tried creating a new project for MK20DX256xxx10 chip and it allows me to add KSDK 1.2 support.

Best Regards,

Isaac

[yarannan]

Thanks for the reply and i think i selected MK20DX256Zxxx10.

What is difference between these two?

Thanks,

Yaran

[isaacavila]

HI Yaran,

Difference between them is silicion revision, the one that does not have 'Z' is the newest version, so we recommend you to use this one.

I hope this can help you,

Best Regards,

Isaac

[yarannan]

Hi Issac,

Thanks for your information. The project contains a lot other features. It will be not easy

to use KSDK1.2.0 at the old project. By the first post you mentioned above, after i enable

RxFifo, how do i read data? Currently, I use LDD_CAN_TFrame RxFrame to store it. Once

I enable FIFO, does it mean i should read data manually too?

Thanks,

Yaran

[isaacavila]

Hello Yaran,

Unfortunately I would say that you need to modify your driver.

PE CAN driver polls and reads from different Message Buffers, however, when FIFO enable is used, All Incoming Messages will be read from same Message Buffer index (MB0), and other buffer memory is reserved for FIFO engine. (You can consult more details in Reference Manual, section 46.3.41 RxFIFO Structure). So PE CAN driver is not compliant with these considerations.

You should also modified the way you read Message Buffers status according to "Frames available in Rx FIFO", "RxFIFO Warning" and "Rx FIFO Overflow" flags.

I hope this can help you.

Best Regards,

Isaac

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[isaacavila]

Hello Yaran,

To enable RxFIFO you could create a new function/define that accesses to CAN registers and sets RFEN bit in MCR register. For example, in your main.c:

(This is code generated in processor expert for Init_CAN component).

#define CAN_PDD_EnableRxFIFO(PeripheralBase, State) ( \
    CAN_MCR_REG(PeripheralBase) = \
     (uint32_t)(( \
      (uint32_t)(CAN_MCR_REG(PeripheralBase) & (uint32_t)(~(uint32_t)CAN_MCR_RFEN_MASK))) | ( \
      (uint32_t)((uint32_t)(State) << CAN_MCR_RFEN_SHIFT))) \
  )

And this is used as follows:

CAN_PDD_EnableRxFIFO(CAN1_BASE_PTR,1); /* Enable RxFIFO */

Once RxFIFO is enabled, take care when polling for new incoming messages in CANx_IFLAG1 register, there are 3 flags BUF7I, BUF6I and BUF5I, BUF5I known as "Frames available in Rx FIFO", BUF6I "Rx FIFO Warning" and BUF7I "Rx FIFO Overflow".

• BUF5I (Frames availble in RxFIFO) is asserted when there is at least one frame available to be read from FIFO. (If interrupt for BUF5 is enabled in CANx_IMASK1 register)
• BUF6I (Rx FIFO warning) is asserted when the number of unread messages is increased to 5 from 4.
• BUF7I (Rx FIFO Overflow) is asserted when an incoming message was lost because the Rx FIFO is full.

So basically, you should modify current driver in order to polled for these flags.

For more details, you can consult Rx FIFO section (Section 46.4.7 in Reference manual)

I hope this can help you.

Best Regards,

Isaac

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